Struct esp32c3::INTERRUPT_CORE0
source · pub struct INTERRUPT_CORE0 { /* private fields */ }
Expand description
Interrupt Controller (Core 0)
Implementations§
source§impl INTERRUPT_CORE0
impl INTERRUPT_CORE0
sourcepub const PTR: *const RegisterBlock = {0x600c2000 as *const interrupt_core0::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x600c2000 as *const interrupt_core0::RegisterBlock}
Pointer to the register block
sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
sourcepub fn mac_intr_map(&self) -> &MAC_INTR_MAP
pub fn mac_intr_map(&self) -> &MAC_INTR_MAP
0x00 - mac intr map register
sourcepub fn mac_nmi_map(&self) -> &MAC_NMI_MAP
pub fn mac_nmi_map(&self) -> &MAC_NMI_MAP
0x04 - mac nmi_intr map register
sourcepub fn pwr_intr_map(&self) -> &PWR_INTR_MAP
pub fn pwr_intr_map(&self) -> &PWR_INTR_MAP
0x08 - pwr intr map register
sourcepub fn bb_int_map(&self) -> &BB_INT_MAP
pub fn bb_int_map(&self) -> &BB_INT_MAP
0x0c - bb intr map register
sourcepub fn bt_mac_int_map(&self) -> &BT_MAC_INT_MAP
pub fn bt_mac_int_map(&self) -> &BT_MAC_INT_MAP
0x10 - bt intr map register
sourcepub fn bt_bb_int_map(&self) -> &BT_BB_INT_MAP
pub fn bt_bb_int_map(&self) -> &BT_BB_INT_MAP
0x14 - bb_bt intr map register
sourcepub fn bt_bb_nmi_map(&self) -> &BT_BB_NMI_MAP
pub fn bt_bb_nmi_map(&self) -> &BT_BB_NMI_MAP
0x18 - bb_bt_nmi intr map register
sourcepub fn rwbt_irq_map(&self) -> &RWBT_IRQ_MAP
pub fn rwbt_irq_map(&self) -> &RWBT_IRQ_MAP
0x1c - rwbt intr map register
sourcepub fn rwble_irq_map(&self) -> &RWBLE_IRQ_MAP
pub fn rwble_irq_map(&self) -> &RWBLE_IRQ_MAP
0x20 - rwble intr map register
sourcepub fn rwbt_nmi_map(&self) -> &RWBT_NMI_MAP
pub fn rwbt_nmi_map(&self) -> &RWBT_NMI_MAP
0x24 - rwbt_nmi intr map register
sourcepub fn rwble_nmi_map(&self) -> &RWBLE_NMI_MAP
pub fn rwble_nmi_map(&self) -> &RWBLE_NMI_MAP
0x28 - rwble_nmi intr map register
sourcepub fn i2c_mst_int_map(&self) -> &I2C_MST_INT_MAP
pub fn i2c_mst_int_map(&self) -> &I2C_MST_INT_MAP
0x2c - i2c intr map register
sourcepub fn slc0_intr_map(&self) -> &SLC0_INTR_MAP
pub fn slc0_intr_map(&self) -> &SLC0_INTR_MAP
0x30 - slc0 intr map register
sourcepub fn slc1_intr_map(&self) -> &SLC1_INTR_MAP
pub fn slc1_intr_map(&self) -> &SLC1_INTR_MAP
0x34 - slc1 intr map register
sourcepub fn apb_ctrl_intr_map(&self) -> &APB_CTRL_INTR_MAP
pub fn apb_ctrl_intr_map(&self) -> &APB_CTRL_INTR_MAP
0x38 - apb_ctrl intr map register
sourcepub fn uhci0_intr_map(&self) -> &UHCI0_INTR_MAP
pub fn uhci0_intr_map(&self) -> &UHCI0_INTR_MAP
0x3c - uchi0 intr map register
sourcepub fn gpio_interrupt_pro_map(&self) -> &GPIO_INTERRUPT_PRO_MAP
pub fn gpio_interrupt_pro_map(&self) -> &GPIO_INTERRUPT_PRO_MAP
0x40 - gpio intr map register
sourcepub fn gpio_interrupt_pro_nmi_map(&self) -> &GPIO_INTERRUPT_PRO_NMI_MAP
pub fn gpio_interrupt_pro_nmi_map(&self) -> &GPIO_INTERRUPT_PRO_NMI_MAP
0x44 - gpio_pro intr map register
sourcepub fn spi_intr_1_map(&self) -> &SPI_INTR_1_MAP
pub fn spi_intr_1_map(&self) -> &SPI_INTR_1_MAP
0x48 - gpio_pro_nmi intr map register
sourcepub fn spi_intr_2_map(&self) -> &SPI_INTR_2_MAP
pub fn spi_intr_2_map(&self) -> &SPI_INTR_2_MAP
0x4c - spi1 intr map register
sourcepub fn i2s1_int_map(&self) -> &I2S1_INT_MAP
pub fn i2s1_int_map(&self) -> &I2S1_INT_MAP
0x50 - spi2 intr map register
sourcepub fn uart_intr_map(&self) -> &UART_INTR_MAP
pub fn uart_intr_map(&self) -> &UART_INTR_MAP
0x54 - i2s1 intr map register
sourcepub fn uart1_intr_map(&self) -> &UART1_INTR_MAP
pub fn uart1_intr_map(&self) -> &UART1_INTR_MAP
0x58 - uart1 intr map register
sourcepub fn ledc_int_map(&self) -> &LEDC_INT_MAP
pub fn ledc_int_map(&self) -> &LEDC_INT_MAP
0x5c - ledc intr map register
sourcepub fn efuse_int_map(&self) -> &EFUSE_INT_MAP
pub fn efuse_int_map(&self) -> &EFUSE_INT_MAP
0x60 - efuse intr map register
sourcepub fn can_int_map(&self) -> &CAN_INT_MAP
pub fn can_int_map(&self) -> &CAN_INT_MAP
0x64 - can intr map register
sourcepub fn usb_intr_map(&self) -> &USB_INTR_MAP
pub fn usb_intr_map(&self) -> &USB_INTR_MAP
0x68 - usb intr map register
sourcepub fn rtc_core_intr_map(&self) -> &RTC_CORE_INTR_MAP
pub fn rtc_core_intr_map(&self) -> &RTC_CORE_INTR_MAP
0x6c - rtc intr map register
sourcepub fn rmt_intr_map(&self) -> &RMT_INTR_MAP
pub fn rmt_intr_map(&self) -> &RMT_INTR_MAP
0x70 - rmt intr map register
sourcepub fn i2c_ext0_intr_map(&self) -> &I2C_EXT0_INTR_MAP
pub fn i2c_ext0_intr_map(&self) -> &I2C_EXT0_INTR_MAP
0x74 - i2c intr map register
sourcepub fn timer_int1_map(&self) -> &TIMER_INT1_MAP
pub fn timer_int1_map(&self) -> &TIMER_INT1_MAP
0x78 - timer1 intr map register
sourcepub fn timer_int2_map(&self) -> &TIMER_INT2_MAP
pub fn timer_int2_map(&self) -> &TIMER_INT2_MAP
0x7c - timer2 intr map register
sourcepub fn tg_t0_int_map(&self) -> &TG_T0_INT_MAP
pub fn tg_t0_int_map(&self) -> &TG_T0_INT_MAP
0x80 - tg to intr map register
sourcepub fn tg_wdt_int_map(&self) -> &TG_WDT_INT_MAP
pub fn tg_wdt_int_map(&self) -> &TG_WDT_INT_MAP
0x84 - tg wdt intr map register
sourcepub fn tg1_t0_int_map(&self) -> &TG1_T0_INT_MAP
pub fn tg1_t0_int_map(&self) -> &TG1_T0_INT_MAP
0x88 - tg1 to intr map register
sourcepub fn tg1_wdt_int_map(&self) -> &TG1_WDT_INT_MAP
pub fn tg1_wdt_int_map(&self) -> &TG1_WDT_INT_MAP
0x8c - tg1 wdt intr map register
sourcepub fn cache_ia_int_map(&self) -> &CACHE_IA_INT_MAP
pub fn cache_ia_int_map(&self) -> &CACHE_IA_INT_MAP
0x90 - cache ia intr map register
sourcepub fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP
pub fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP
0x94 - systimer intr map register
sourcepub fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP
pub fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP
0x98 - systimer target1 intr map register
sourcepub fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP
pub fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP
0x9c - systimer target2 intr map register
sourcepub fn spi_mem_reject_intr_map(&self) -> &SPI_MEM_REJECT_INTR_MAP
pub fn spi_mem_reject_intr_map(&self) -> &SPI_MEM_REJECT_INTR_MAP
0xa0 - spi mem reject intr map register
sourcepub fn icache_preload_int_map(&self) -> &ICACHE_PRELOAD_INT_MAP
pub fn icache_preload_int_map(&self) -> &ICACHE_PRELOAD_INT_MAP
0xa4 - icache perload intr map register
sourcepub fn icache_sync_int_map(&self) -> &ICACHE_SYNC_INT_MAP
pub fn icache_sync_int_map(&self) -> &ICACHE_SYNC_INT_MAP
0xa8 - icache sync intr map register
sourcepub fn apb_adc_int_map(&self) -> &APB_ADC_INT_MAP
pub fn apb_adc_int_map(&self) -> &APB_ADC_INT_MAP
0xac - adc intr map register
sourcepub fn dma_ch0_int_map(&self) -> &DMA_CH0_INT_MAP
pub fn dma_ch0_int_map(&self) -> &DMA_CH0_INT_MAP
0xb0 - dma ch0 intr map register
sourcepub fn dma_ch1_int_map(&self) -> &DMA_CH1_INT_MAP
pub fn dma_ch1_int_map(&self) -> &DMA_CH1_INT_MAP
0xb4 - dma ch1 intr map register
sourcepub fn dma_ch2_int_map(&self) -> &DMA_CH2_INT_MAP
pub fn dma_ch2_int_map(&self) -> &DMA_CH2_INT_MAP
0xb8 - dma ch2 intr map register
sourcepub fn rsa_int_map(&self) -> &RSA_INT_MAP
pub fn rsa_int_map(&self) -> &RSA_INT_MAP
0xbc - rsa intr map register
sourcepub fn aes_int_map(&self) -> &AES_INT_MAP
pub fn aes_int_map(&self) -> &AES_INT_MAP
0xc0 - aes intr map register
sourcepub fn sha_int_map(&self) -> &SHA_INT_MAP
pub fn sha_int_map(&self) -> &SHA_INT_MAP
0xc4 - sha intr map register
sourcepub fn cpu_intr_from_cpu_0_map(&self) -> &CPU_INTR_FROM_CPU_0_MAP
pub fn cpu_intr_from_cpu_0_map(&self) -> &CPU_INTR_FROM_CPU_0_MAP
0xc8 - cpu from cpu 0 intr map register
sourcepub fn cpu_intr_from_cpu_1_map(&self) -> &CPU_INTR_FROM_CPU_1_MAP
pub fn cpu_intr_from_cpu_1_map(&self) -> &CPU_INTR_FROM_CPU_1_MAP
0xcc - cpu from cpu 0 intr map register
sourcepub fn cpu_intr_from_cpu_2_map(&self) -> &CPU_INTR_FROM_CPU_2_MAP
pub fn cpu_intr_from_cpu_2_map(&self) -> &CPU_INTR_FROM_CPU_2_MAP
0xd0 - cpu from cpu 1 intr map register
sourcepub fn cpu_intr_from_cpu_3_map(&self) -> &CPU_INTR_FROM_CPU_3_MAP
pub fn cpu_intr_from_cpu_3_map(&self) -> &CPU_INTR_FROM_CPU_3_MAP
0xd4 - cpu from cpu 3 intr map register
sourcepub fn assist_debug_intr_map(&self) -> &ASSIST_DEBUG_INTR_MAP
pub fn assist_debug_intr_map(&self) -> &ASSIST_DEBUG_INTR_MAP
0xd8 - assist debug intr map register
sourcepub fn dma_apbperi_pms_monitor_violate_intr_map(
&self
) -> &DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP
pub fn dma_apbperi_pms_monitor_violate_intr_map( &self ) -> &DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP
0xdc - dma pms violatile intr map register
sourcepub fn core_0_iram0_pms_monitor_violate_intr_map(
&self
) -> &CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP
pub fn core_0_iram0_pms_monitor_violate_intr_map( &self ) -> &CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP
0xe0 - iram0 pms violatile intr map register
sourcepub fn core_0_dram0_pms_monitor_violate_intr_map(
&self
) -> &CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP
pub fn core_0_dram0_pms_monitor_violate_intr_map( &self ) -> &CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP
0xe4 - mac intr map register
sourcepub fn core_0_pif_pms_monitor_violate_intr_map(
&self
) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP
pub fn core_0_pif_pms_monitor_violate_intr_map( &self ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP
0xe8 - mac intr map register
sourcepub fn core_0_pif_pms_monitor_violate_size_intr_map(
&self
) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP
pub fn core_0_pif_pms_monitor_violate_size_intr_map( &self ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP
0xec - mac intr map register
sourcepub fn backup_pms_violate_intr_map(&self) -> &BACKUP_PMS_VIOLATE_INTR_MAP
pub fn backup_pms_violate_intr_map(&self) -> &BACKUP_PMS_VIOLATE_INTR_MAP
0xf0 - mac intr map register
sourcepub fn cache_core0_acs_int_map(&self) -> &CACHE_CORE0_ACS_INT_MAP
pub fn cache_core0_acs_int_map(&self) -> &CACHE_CORE0_ACS_INT_MAP
0xf4 - mac intr map register
sourcepub fn intr_status_reg_0(&self) -> &INTR_STATUS_REG_0
pub fn intr_status_reg_0(&self) -> &INTR_STATUS_REG_0
0xf8 - mac intr map register
sourcepub fn intr_status_reg_1(&self) -> &INTR_STATUS_REG_1
pub fn intr_status_reg_1(&self) -> &INTR_STATUS_REG_1
0xfc - mac intr map register
sourcepub fn clock_gate(&self) -> &CLOCK_GATE
pub fn clock_gate(&self) -> &CLOCK_GATE
0x100 - mac intr map register
sourcepub fn cpu_int_enable(&self) -> &CPU_INT_ENABLE
pub fn cpu_int_enable(&self) -> &CPU_INT_ENABLE
0x104 - mac intr map register
sourcepub fn cpu_int_type(&self) -> &CPU_INT_TYPE
pub fn cpu_int_type(&self) -> &CPU_INT_TYPE
0x108 - mac intr map register
sourcepub fn cpu_int_clear(&self) -> &CPU_INT_CLEAR
pub fn cpu_int_clear(&self) -> &CPU_INT_CLEAR
0x10c - mac intr map register
sourcepub fn cpu_int_eip_status(&self) -> &CPU_INT_EIP_STATUS
pub fn cpu_int_eip_status(&self) -> &CPU_INT_EIP_STATUS
0x110 - mac intr map register
sourcepub fn cpu_int_pri_0(&self) -> &CPU_INT_PRI_0
pub fn cpu_int_pri_0(&self) -> &CPU_INT_PRI_0
0x114 - mac intr map register
sourcepub fn cpu_int_pri_1(&self) -> &CPU_INT_PRI_1
pub fn cpu_int_pri_1(&self) -> &CPU_INT_PRI_1
0x118 - mac intr map register
sourcepub fn cpu_int_pri_2(&self) -> &CPU_INT_PRI_2
pub fn cpu_int_pri_2(&self) -> &CPU_INT_PRI_2
0x11c - mac intr map register
sourcepub fn cpu_int_pri_3(&self) -> &CPU_INT_PRI_3
pub fn cpu_int_pri_3(&self) -> &CPU_INT_PRI_3
0x120 - mac intr map register
sourcepub fn cpu_int_pri_4(&self) -> &CPU_INT_PRI_4
pub fn cpu_int_pri_4(&self) -> &CPU_INT_PRI_4
0x124 - mac intr map register
sourcepub fn cpu_int_pri_5(&self) -> &CPU_INT_PRI_5
pub fn cpu_int_pri_5(&self) -> &CPU_INT_PRI_5
0x128 - mac intr map register
sourcepub fn cpu_int_pri_6(&self) -> &CPU_INT_PRI_6
pub fn cpu_int_pri_6(&self) -> &CPU_INT_PRI_6
0x12c - mac intr map register
sourcepub fn cpu_int_pri_7(&self) -> &CPU_INT_PRI_7
pub fn cpu_int_pri_7(&self) -> &CPU_INT_PRI_7
0x130 - mac intr map register
sourcepub fn cpu_int_pri_8(&self) -> &CPU_INT_PRI_8
pub fn cpu_int_pri_8(&self) -> &CPU_INT_PRI_8
0x134 - mac intr map register
sourcepub fn cpu_int_pri_9(&self) -> &CPU_INT_PRI_9
pub fn cpu_int_pri_9(&self) -> &CPU_INT_PRI_9
0x138 - mac intr map register
sourcepub fn cpu_int_pri_10(&self) -> &CPU_INT_PRI_10
pub fn cpu_int_pri_10(&self) -> &CPU_INT_PRI_10
0x13c - mac intr map register
sourcepub fn cpu_int_pri_11(&self) -> &CPU_INT_PRI_11
pub fn cpu_int_pri_11(&self) -> &CPU_INT_PRI_11
0x140 - mac intr map register
sourcepub fn cpu_int_pri_12(&self) -> &CPU_INT_PRI_12
pub fn cpu_int_pri_12(&self) -> &CPU_INT_PRI_12
0x144 - mac intr map register
sourcepub fn cpu_int_pri_13(&self) -> &CPU_INT_PRI_13
pub fn cpu_int_pri_13(&self) -> &CPU_INT_PRI_13
0x148 - mac intr map register
sourcepub fn cpu_int_pri_14(&self) -> &CPU_INT_PRI_14
pub fn cpu_int_pri_14(&self) -> &CPU_INT_PRI_14
0x14c - mac intr map register
sourcepub fn cpu_int_pri_15(&self) -> &CPU_INT_PRI_15
pub fn cpu_int_pri_15(&self) -> &CPU_INT_PRI_15
0x150 - mac intr map register
sourcepub fn cpu_int_pri_16(&self) -> &CPU_INT_PRI_16
pub fn cpu_int_pri_16(&self) -> &CPU_INT_PRI_16
0x154 - mac intr map register
sourcepub fn cpu_int_pri_17(&self) -> &CPU_INT_PRI_17
pub fn cpu_int_pri_17(&self) -> &CPU_INT_PRI_17
0x158 - mac intr map register
sourcepub fn cpu_int_pri_18(&self) -> &CPU_INT_PRI_18
pub fn cpu_int_pri_18(&self) -> &CPU_INT_PRI_18
0x15c - mac intr map register
sourcepub fn cpu_int_pri_19(&self) -> &CPU_INT_PRI_19
pub fn cpu_int_pri_19(&self) -> &CPU_INT_PRI_19
0x160 - mac intr map register
sourcepub fn cpu_int_pri_20(&self) -> &CPU_INT_PRI_20
pub fn cpu_int_pri_20(&self) -> &CPU_INT_PRI_20
0x164 - mac intr map register
sourcepub fn cpu_int_pri_21(&self) -> &CPU_INT_PRI_21
pub fn cpu_int_pri_21(&self) -> &CPU_INT_PRI_21
0x168 - mac intr map register
sourcepub fn cpu_int_pri_22(&self) -> &CPU_INT_PRI_22
pub fn cpu_int_pri_22(&self) -> &CPU_INT_PRI_22
0x16c - mac intr map register
sourcepub fn cpu_int_pri_23(&self) -> &CPU_INT_PRI_23
pub fn cpu_int_pri_23(&self) -> &CPU_INT_PRI_23
0x170 - mac intr map register
sourcepub fn cpu_int_pri_24(&self) -> &CPU_INT_PRI_24
pub fn cpu_int_pri_24(&self) -> &CPU_INT_PRI_24
0x174 - mac intr map register
sourcepub fn cpu_int_pri_25(&self) -> &CPU_INT_PRI_25
pub fn cpu_int_pri_25(&self) -> &CPU_INT_PRI_25
0x178 - mac intr map register
sourcepub fn cpu_int_pri_26(&self) -> &CPU_INT_PRI_26
pub fn cpu_int_pri_26(&self) -> &CPU_INT_PRI_26
0x17c - mac intr map register
sourcepub fn cpu_int_pri_27(&self) -> &CPU_INT_PRI_27
pub fn cpu_int_pri_27(&self) -> &CPU_INT_PRI_27
0x180 - mac intr map register
sourcepub fn cpu_int_pri_28(&self) -> &CPU_INT_PRI_28
pub fn cpu_int_pri_28(&self) -> &CPU_INT_PRI_28
0x184 - mac intr map register
sourcepub fn cpu_int_pri_29(&self) -> &CPU_INT_PRI_29
pub fn cpu_int_pri_29(&self) -> &CPU_INT_PRI_29
0x188 - mac intr map register
sourcepub fn cpu_int_pri_30(&self) -> &CPU_INT_PRI_30
pub fn cpu_int_pri_30(&self) -> &CPU_INT_PRI_30
0x18c - mac intr map register
sourcepub fn cpu_int_pri_31(&self) -> &CPU_INT_PRI_31
pub fn cpu_int_pri_31(&self) -> &CPU_INT_PRI_31
0x190 - mac intr map register
sourcepub fn cpu_int_thresh(&self) -> &CPU_INT_THRESH
pub fn cpu_int_thresh(&self) -> &CPU_INT_THRESH
0x194 - mac intr map register
sourcepub fn interrupt_reg_date(&self) -> &INTERRUPT_REG_DATE
pub fn interrupt_reg_date(&self) -> &INTERRUPT_REG_DATE
0x7fc - mac intr map register