[][src]Type Definition esp32::dport::pro_cache_ctrl1::W

type W = W<u32, PRO_CACHE_CTRL1>;

Writer for register PRO_CACHE_CTRL1

Implementations

impl W[src]

pub fn pro_cache_mmu_ia_clr(&mut self) -> PRO_CACHE_MMU_IA_CLR_W<'_>[src]

Bit 13

pub fn pro_cmmu_pd(&mut self) -> PRO_CMMU_PD_W<'_>[src]

Bit 12

pub fn pro_cmmu_force_on(&mut self) -> PRO_CMMU_FORCE_ON_W<'_>[src]

Bit 11

pub fn pro_cmmu_flash_page_mode(&mut self) -> PRO_CMMU_FLASH_PAGE_MODE_W<'_>[src]

Bits 9:10

pub fn pro_cmmu_sram_page_mode(&mut self) -> PRO_CMMU_SRAM_PAGE_MODE_W<'_>[src]

Bits 6:8

pub fn pro_cache_mask_opsdram(&mut self) -> PRO_CACHE_MASK_OPSDRAM_W<'_>[src]

Bit 5

pub fn pro_cache_mask_drom0(&mut self) -> PRO_CACHE_MASK_DROM0_W<'_>[src]

Bit 4

pub fn pro_cache_mask_dram1(&mut self) -> PRO_CACHE_MASK_DRAM1_W<'_>[src]

Bit 3

pub fn pro_cache_mask_irom0(&mut self) -> PRO_CACHE_MASK_IROM0_W<'_>[src]

Bit 2

pub fn pro_cache_mask_iram1(&mut self) -> PRO_CACHE_MASK_IRAM1_W<'_>[src]

Bit 1

pub fn pro_cache_mask_iram0(&mut self) -> PRO_CACHE_MASK_IRAM0_W<'_>[src]

Bit 0