[−][src]Struct esp32::pcnt::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub u0_conf0: U0_CONF0,
    pub u0_conf1: U0_CONF1,
    pub u0_conf2: U0_CONF2,
    pub u1_conf0: U1_CONF0,
    pub u1_conf1: U1_CONF1,
    pub u1_conf2: U1_CONF2,
    pub u2_conf0: U2_CONF0,
    pub u2_conf1: U2_CONF1,
    pub u2_conf2: U2_CONF2,
    pub u3_conf0: U3_CONF0,
    pub u3_conf1: U3_CONF1,
    pub u3_conf2: U3_CONF2,
    pub u4_conf0: U4_CONF0,
    pub u4_conf1: U4_CONF1,
    pub u4_conf2: U4_CONF2,
    pub u5_conf0: U5_CONF0,
    pub u5_conf1: U5_CONF1,
    pub u5_conf2: U5_CONF2,
    pub u6_conf0: U6_CONF0,
    pub u6_conf1: U6_CONF1,
    pub u6_conf2: U6_CONF2,
    pub u7_conf0: U7_CONF0,
    pub u7_conf1: U7_CONF1,
    pub u7_conf2: U7_CONF2,
    pub u0_cnt: U0_CNT,
    pub u1_cnt: U1_CNT,
    pub u2_cnt: U2_CNT,
    pub u3_cnt: U3_CNT,
    pub u4_cnt: U4_CNT,
    pub u5_cnt: U5_CNT,
    pub u6_cnt: U6_CNT,
    pub u7_cnt: U7_CNT,
    pub int_raw: INT_RAW,
    pub int_st: INT_ST,
    pub int_ena: INT_ENA,
    pub int_clr: INT_CLR,
    pub u0_status: U0_STATUS,
    pub u1_status: U1_STATUS,
    pub u2_status: U2_STATUS,
    pub u3_status: U3_STATUS,
    pub u4_status: U4_STATUS,
    pub u5_status: U5_STATUS,
    pub u6_status: U6_STATUS,
    pub u7_status: U7_STATUS,
    pub ctrl: CTRL,
    pub date: DATE,
    // some fields omitted
}

Register block

Fields

u0_conf0: U0_CONF0

0x00 - PCNT_U0_CONF0

u0_conf1: U0_CONF1

0x04 - PCNT_U0_CONF1

u0_conf2: U0_CONF2

0x08 - PCNT_U0_CONF2

u1_conf0: U1_CONF0

0x0c - PCNT_U1_CONF0

u1_conf1: U1_CONF1

0x10 - PCNT_U1_CONF1

u1_conf2: U1_CONF2

0x14 - PCNT_U1_CONF2

u2_conf0: U2_CONF0

0x18 - PCNT_U2_CONF0

u2_conf1: U2_CONF1

0x1c - PCNT_U2_CONF1

u2_conf2: U2_CONF2

0x20 - PCNT_U2_CONF2

u3_conf0: U3_CONF0

0x24 - PCNT_U3_CONF0

u3_conf1: U3_CONF1

0x28 - PCNT_U3_CONF1

u3_conf2: U3_CONF2

0x2c - PCNT_U3_CONF2

u4_conf0: U4_CONF0

0x30 - PCNT_U4_CONF0

u4_conf1: U4_CONF1

0x34 - PCNT_U4_CONF1

u4_conf2: U4_CONF2

0x38 - PCNT_U4_CONF2

u5_conf0: U5_CONF0

0x3c - PCNT_U5_CONF0

u5_conf1: U5_CONF1

0x40 - PCNT_U5_CONF1

u5_conf2: U5_CONF2

0x44 - PCNT_U5_CONF2

u6_conf0: U6_CONF0

0x48 - PCNT_U6_CONF0

u6_conf1: U6_CONF1

0x4c - PCNT_U6_CONF1

u6_conf2: U6_CONF2

0x50 - PCNT_U6_CONF2

u7_conf0: U7_CONF0

0x54 - PCNT_U7_CONF0

u7_conf1: U7_CONF1

0x58 - PCNT_U7_CONF1

u7_conf2: U7_CONF2

0x5c - PCNT_U7_CONF2

u0_cnt: U0_CNT

0x60 - PCNT_U0_CNT

u1_cnt: U1_CNT

0x64 - PCNT_U1_CNT

u2_cnt: U2_CNT

0x68 - PCNT_U2_CNT

u3_cnt: U3_CNT

0x6c - PCNT_U3_CNT

u4_cnt: U4_CNT

0x70 - PCNT_U4_CNT

u5_cnt: U5_CNT

0x74 - PCNT_U5_CNT

u6_cnt: U6_CNT

0x78 - PCNT_U6_CNT

u7_cnt: U7_CNT

0x7c - PCNT_U7_CNT

int_raw: INT_RAW

0x80 - PCNT_INT_RAW

int_st: INT_ST

0x84 - PCNT_INT_ST

int_ena: INT_ENA

0x88 - PCNT_INT_ENA

int_clr: INT_CLR

0x8c - PCNT_INT_CLR

u0_status: U0_STATUS

0x90 - PCNT_U0_STATUS

u1_status: U1_STATUS

0x94 - PCNT_U1_STATUS

u2_status: U2_STATUS

0x98 - PCNT_U2_STATUS

u3_status: U3_STATUS

0x9c - PCNT_U3_STATUS

u4_status: U4_STATUS

0xa0 - PCNT_U4_STATUS

u5_status: U5_STATUS

0xa4 - PCNT_U5_STATUS

u6_status: U6_STATUS

0xa8 - PCNT_U6_STATUS

u7_status: U7_STATUS

0xac - PCNT_U7_STATUS

ctrl: CTRL

0xb0 - PCNT_CTRL

date: DATE

0xfc - PCNT_DATE

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