Type Definition esp32::dport::cache_ia_int_en::W

type W = W<u32, CACHE_IA_INT_EN>;

Writer for register CACHE_IA_INT_EN

Implementations

impl W

pub fn cache_ia_int_en(&mut self) -> CACHE_IA_INT_EN_W<'_>

Bits 0:27

pub fn cache_ia_int_pro_opposite(&mut self) -> CACHE_IA_INT_PRO_OPPOSITE_W<'_>

Bit 19

pub fn cache_ia_int_pro_dram1(&mut self) -> CACHE_IA_INT_PRO_DRAM1_W<'_>

Bit 18

pub fn cache_ia_int_pro_irom0(&mut self) -> CACHE_IA_INT_PRO_IROM0_W<'_>

Bit 17

pub fn cache_ia_int_pro_iram1(&mut self) -> CACHE_IA_INT_PRO_IRAM1_W<'_>

Bit 16

pub fn cache_ia_int_pro_iram0(&mut self) -> CACHE_IA_INT_PRO_IRAM0_W<'_>

Bit 15

pub fn cache_ia_int_pro_drom0(&mut self) -> CACHE_IA_INT_PRO_DROM0_W<'_>

Bit 14

pub fn cache_ia_int_app_opposite(&mut self) -> CACHE_IA_INT_APP_OPPOSITE_W<'_>

Bit 5

pub fn cache_ia_int_app_irom0(&mut self) -> CACHE_IA_INT_APP_IROM0_W<'_>

Bit 3

pub fn cache_ia_int_app_iram1(&mut self) -> CACHE_IA_INT_APP_IRAM1_W<'_>

Bit 2

pub fn cache_ia_int_app_iram0(&mut self) -> CACHE_IA_INT_APP_IRAM0_W<'_>

Bit 1

pub fn cache_ia_int_app_drom0(&mut self) -> CACHE_IA_INT_APP_DROM0_W<'_>

Bit 0