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#[doc = "Reader of register IEN"] pub type R = crate::R<u32, super::IEN>; #[doc = "Writer for register IEN"] pub type W = crate::W<u32, super::IEN>; #[doc = "Register IEN `reset()`'s with value 0"] impl crate::ResetValue for super::IEN { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `UF`"] pub type UF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UF`"] pub struct UF_W<'a> { w: &'a mut W, } impl<'a> UF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `OF`"] pub type OF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `OF`"] pub struct OF_W<'a> { w: &'a mut W, } impl<'a> OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `DIRCNG`"] pub type DIRCNG_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DIRCNG`"] pub struct DIRCNG_W<'a> { w: &'a mut W, } impl<'a> DIRCNG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `AUXOF`"] pub type AUXOF_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AUXOF`"] pub struct AUXOF_W<'a> { w: &'a mut W, } impl<'a> AUXOF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `TCC`"] pub type TCC_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TCC`"] pub struct TCC_W<'a> { w: &'a mut W, } impl<'a> TCC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `OQSTERR`"] pub type OQSTERR_R = crate::R<bool, bool>; #[doc = "Write proxy for field `OQSTERR`"] pub struct OQSTERR_W<'a> { w: &'a mut W, } impl<'a> OQSTERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } impl R { #[doc = "Bit 0 - UF Interrupt Enable"] #[inline(always)] pub fn uf(&self) -> UF_R { UF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - OF Interrupt Enable"] #[inline(always)] pub fn of(&self) -> OF_R { OF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - DIRCNG Interrupt Enable"] #[inline(always)] pub fn dircng(&self) -> DIRCNG_R { DIRCNG_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - AUXOF Interrupt Enable"] #[inline(always)] pub fn auxof(&self) -> AUXOF_R { AUXOF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - TCC Interrupt Enable"] #[inline(always)] pub fn tcc(&self) -> TCC_R { TCC_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - OQSTERR Interrupt Enable"] #[inline(always)] pub fn oqsterr(&self) -> OQSTERR_R { OQSTERR_R::new(((self.bits >> 5) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - UF Interrupt Enable"] #[inline(always)] pub fn uf(&mut self) -> UF_W { UF_W { w: self } } #[doc = "Bit 1 - OF Interrupt Enable"] #[inline(always)] pub fn of(&mut self) -> OF_W { OF_W { w: self } } #[doc = "Bit 2 - DIRCNG Interrupt Enable"] #[inline(always)] pub fn dircng(&mut self) -> DIRCNG_W { DIRCNG_W { w: self } } #[doc = "Bit 3 - AUXOF Interrupt Enable"] #[inline(always)] pub fn auxof(&mut self) -> AUXOF_W { AUXOF_W { w: self } } #[doc = "Bit 4 - TCC Interrupt Enable"] #[inline(always)] pub fn tcc(&mut self) -> TCC_W { TCC_W { w: self } } #[doc = "Bit 5 - OQSTERR Interrupt Enable"] #[inline(always)] pub fn oqsterr(&mut self) -> OQSTERR_W { OQSTERR_W { w: self } } }