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#[doc = "Reader of register ROUTE"] pub type R = crate::R<u32, super::ROUTE>; #[doc = "Writer for register ROUTE"] pub type W = crate::W<u32, super::ROUTE>; #[doc = "Register ROUTE `reset()`'s with value 0"] impl crate::ResetValue for super::ROUTE { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `CC0PEN`"] pub type CC0PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CC0PEN`"] pub struct CC0PEN_W<'a> { w: &'a mut W, } impl<'a> CC0PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `CC1PEN`"] pub type CC1PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CC1PEN`"] pub struct CC1PEN_W<'a> { w: &'a mut W, } impl<'a> CC1PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `CC2PEN`"] pub type CC2PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CC2PEN`"] pub struct CC2PEN_W<'a> { w: &'a mut W, } impl<'a> CC2PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `CDTI0PEN`"] pub type CDTI0PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CDTI0PEN`"] pub struct CDTI0PEN_W<'a> { w: &'a mut W, } impl<'a> CDTI0PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `CDTI1PEN`"] pub type CDTI1PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CDTI1PEN`"] pub struct CDTI1PEN_W<'a> { w: &'a mut W, } impl<'a> CDTI1PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `CDTI2PEN`"] pub type CDTI2PEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CDTI2PEN`"] pub struct CDTI2PEN_W<'a> { w: &'a mut W, } impl<'a> CDTI2PEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "I/O Location\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum LOCATION_A { #[doc = "0: Location 0"] LOC0, #[doc = "1: Location 1"] LOC1, #[doc = "2: Location 2"] LOC2, #[doc = "3: Location 3"] LOC3, #[doc = "4: Location 4"] LOC4, #[doc = "5: Location 5"] LOC5, #[doc = "6: Location 6"] LOC6, } impl From<LOCATION_A> for u8 { #[inline(always)] fn from(variant: LOCATION_A) -> Self { match variant { LOCATION_A::LOC0 => 0, LOCATION_A::LOC1 => 1, LOCATION_A::LOC2 => 2, LOCATION_A::LOC3 => 3, LOCATION_A::LOC4 => 4, LOCATION_A::LOC5 => 5, LOCATION_A::LOC6 => 6, } } } #[doc = "Reader of field `LOCATION`"] pub type LOCATION_R = crate::R<u8, LOCATION_A>; impl LOCATION_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, LOCATION_A> { use crate::Variant::*; match self.bits { 0 => Val(LOCATION_A::LOC0), 1 => Val(LOCATION_A::LOC1), 2 => Val(LOCATION_A::LOC2), 3 => Val(LOCATION_A::LOC3), 4 => Val(LOCATION_A::LOC4), 5 => Val(LOCATION_A::LOC5), 6 => Val(LOCATION_A::LOC6), i => Res(i), } } #[doc = "Checks if the value of the field is `LOC0`"] #[inline(always)] pub fn is_loc0(&self) -> bool { *self == LOCATION_A::LOC0 } #[doc = "Checks if the value of the field is `LOC1`"] #[inline(always)] pub fn is_loc1(&self) -> bool { *self == LOCATION_A::LOC1 } #[doc = "Checks if the value of the field is `LOC2`"] #[inline(always)] pub fn is_loc2(&self) -> bool { *self == LOCATION_A::LOC2 } #[doc = "Checks if the value of the field is `LOC3`"] #[inline(always)] pub fn is_loc3(&self) -> bool { *self == LOCATION_A::LOC3 } #[doc = "Checks if the value of the field is `LOC4`"] #[inline(always)] pub fn is_loc4(&self) -> bool { *self == LOCATION_A::LOC4 } #[doc = "Checks if the value of the field is `LOC5`"] #[inline(always)] pub fn is_loc5(&self) -> bool { *self == LOCATION_A::LOC5 } #[doc = "Checks if the value of the field is `LOC6`"] #[inline(always)] pub fn is_loc6(&self) -> bool { *self == LOCATION_A::LOC6 } } #[doc = "Write proxy for field `LOCATION`"] pub struct LOCATION_W<'a> { w: &'a mut W, } impl<'a> LOCATION_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: LOCATION_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Location 0"] #[inline(always)] pub fn loc0(self) -> &'a mut W { self.variant(LOCATION_A::LOC0) } #[doc = "Location 1"] #[inline(always)] pub fn loc1(self) -> &'a mut W { self.variant(LOCATION_A::LOC1) } #[doc = "Location 2"] #[inline(always)] pub fn loc2(self) -> &'a mut W { self.variant(LOCATION_A::LOC2) } #[doc = "Location 3"] #[inline(always)] pub fn loc3(self) -> &'a mut W { self.variant(LOCATION_A::LOC3) } #[doc = "Location 4"] #[inline(always)] pub fn loc4(self) -> &'a mut W { self.variant(LOCATION_A::LOC4) } #[doc = "Location 5"] #[inline(always)] pub fn loc5(self) -> &'a mut W { self.variant(LOCATION_A::LOC5) } #[doc = "Location 6"] #[inline(always)] pub fn loc6(self) -> &'a mut W { self.variant(LOCATION_A::LOC6) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16); self.w } } impl R { #[doc = "Bit 0 - CC Channel 0 Pin Enable"] #[inline(always)] pub fn cc0pen(&self) -> CC0PEN_R { CC0PEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - CC Channel 1 Pin Enable"] #[inline(always)] pub fn cc1pen(&self) -> CC1PEN_R { CC1PEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - CC Channel 2 Pin Enable"] #[inline(always)] pub fn cc2pen(&self) -> CC2PEN_R { CC2PEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti0pen(&self) -> CDTI0PEN_R { CDTI0PEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti1pen(&self) -> CDTI1PEN_R { CDTI1PEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti2pen(&self) -> CDTI2PEN_R { CDTI2PEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 16:18 - I/O Location"] #[inline(always)] pub fn location(&self) -> LOCATION_R { LOCATION_R::new(((self.bits >> 16) & 0x07) as u8) } } impl W { #[doc = "Bit 0 - CC Channel 0 Pin Enable"] #[inline(always)] pub fn cc0pen(&mut self) -> CC0PEN_W { CC0PEN_W { w: self } } #[doc = "Bit 1 - CC Channel 1 Pin Enable"] #[inline(always)] pub fn cc1pen(&mut self) -> CC1PEN_W { CC1PEN_W { w: self } } #[doc = "Bit 2 - CC Channel 2 Pin Enable"] #[inline(always)] pub fn cc2pen(&mut self) -> CC2PEN_W { CC2PEN_W { w: self } } #[doc = "Bit 8 - CC Channel 0 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti0pen(&mut self) -> CDTI0PEN_W { CDTI0PEN_W { w: self } } #[doc = "Bit 9 - CC Channel 1 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti1pen(&mut self) -> CDTI1PEN_W { CDTI1PEN_W { w: self } } #[doc = "Bit 10 - CC Channel 2 Complementary Dead-Time Insertion Pin Enable"] #[inline(always)] pub fn cdti2pen(&mut self) -> CDTI2PEN_W { CDTI2PEN_W { w: self } } #[doc = "Bits 16:18 - I/O Location"] #[inline(always)] pub fn location(&mut self) -> LOCATION_W { LOCATION_W { w: self } } }