[][src]Type Definition efm32gg11b820::vdac0::opa0_ctrl::W

type W = W<u32, OPA0_CTRL>;

Writer for register OPA0_CTRL

Implementations

impl W[src]

pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W<'_>[src]

Bits 0:1 - OPAx Operation Mode

pub fn incbw(&mut self) -> INCBW_W<'_>[src]

Bit 2 - OPAx Unity Gain Bandwidth Scale

pub fn hcmdis(&mut self) -> HCMDIS_W<'_>[src]

Bit 3 - High Common Mode Disable

pub fn outscale(&mut self) -> OUTSCALE_W<'_>[src]

Bit 4 - Scale OPAx Output Driving Strength

pub fn prsen(&mut self) -> PRSEN_W<'_>[src]

Bit 8 - OPAx PRS Trigger Enable

pub fn prsmode(&mut self) -> PRSMODE_W<'_>[src]

Bit 9 - OPAx PRS Trigger Mode

pub fn prssel(&mut self) -> PRSSEL_W<'_>[src]

Bits 10:14 - OPAx PRS Trigger Select

pub fn prsoutmode(&mut self) -> PRSOUTMODE_W<'_>[src]

Bit 16 - OPAx PRS Output Select

pub fn aportxmasterdis(&mut self) -> APORTXMASTERDIS_W<'_>[src]

Bit 20 - APORT Bus Master Disable

pub fn aportymasterdis(&mut self) -> APORTYMASTERDIS_W<'_>[src]

Bit 21 - APORT Bus Master Disable