[−][src]Module efm32gg11b820::prs
PRS
Modules
| ch0_ctrl | Channel Control Register |
| ch1_ctrl | Channel Control Register |
| ch2_ctrl | Channel Control Register |
| ch3_ctrl | Channel Control Register |
| ch4_ctrl | Channel Control Register |
| ch5_ctrl | Channel Control Register |
| ch6_ctrl | Channel Control Register |
| ch7_ctrl | Channel Control Register |
| ch8_ctrl | Channel Control Register |
| ch9_ctrl | Channel Control Register |
| ch10_ctrl | Channel Control Register |
| ch11_ctrl | Channel Control Register |
| ch12_ctrl | Channel Control Register |
| ch13_ctrl | Channel Control Register |
| ch14_ctrl | Channel Control Register |
| ch15_ctrl | Channel Control Register |
| ch16_ctrl | Channel Control Register |
| ch17_ctrl | Channel Control Register |
| ch18_ctrl | Channel Control Register |
| ch19_ctrl | Channel Control Register |
| ch20_ctrl | Channel Control Register |
| ch21_ctrl | Channel Control Register |
| ch22_ctrl | Channel Control Register |
| ch23_ctrl | Channel Control Register |
| ctrl | Control Register |
| dmareq0 | DMA Request 0 Register |
| dmareq1 | DMA Request 1 Register |
| peek | PRS Channel Values |
| routeloc0 | I/O Routing Location Register |
| routeloc1 | I/O Routing Location Register |
| routeloc2 | I/O Routing Location Register |
| routeloc3 | I/O Routing Location Register |
| routeloc4 | I/O Routing Location Register |
| routeloc5 | I/O Routing Location Register |
| routepen | I/O Routing Pin Enable Register |
| swlevel | Software Level Register |
| swpulse | Software Pulse Register |
Structs
| RegisterBlock | Register block |
Type Definitions
| CH0_CTRL | Channel Control Register |
| CH1_CTRL | Channel Control Register |
| CH2_CTRL | Channel Control Register |
| CH3_CTRL | Channel Control Register |
| CH4_CTRL | Channel Control Register |
| CH5_CTRL | Channel Control Register |
| CH6_CTRL | Channel Control Register |
| CH7_CTRL | Channel Control Register |
| CH8_CTRL | Channel Control Register |
| CH9_CTRL | Channel Control Register |
| CH10_CTRL | Channel Control Register |
| CH11_CTRL | Channel Control Register |
| CH12_CTRL | Channel Control Register |
| CH13_CTRL | Channel Control Register |
| CH14_CTRL | Channel Control Register |
| CH15_CTRL | Channel Control Register |
| CH16_CTRL | Channel Control Register |
| CH17_CTRL | Channel Control Register |
| CH18_CTRL | Channel Control Register |
| CH19_CTRL | Channel Control Register |
| CH20_CTRL | Channel Control Register |
| CH21_CTRL | Channel Control Register |
| CH22_CTRL | Channel Control Register |
| CH23_CTRL | Channel Control Register |
| CTRL | Control Register |
| DMAREQ0 | DMA Request 0 Register |
| DMAREQ1 | DMA Request 1 Register |
| PEEK | PRS Channel Values |
| ROUTELOC0 | I/O Routing Location Register |
| ROUTELOC1 | I/O Routing Location Register |
| ROUTELOC2 | I/O Routing Location Register |
| ROUTELOC3 | I/O Routing Location Register |
| ROUTELOC4 | I/O Routing Location Register |
| ROUTELOC5 | I/O Routing Location Register |
| ROUTEPEN | I/O Routing Pin Enable Register |
| SWLEVEL | Software Level Register |
| SWPULSE | Software Pulse Register |