[−][src]Struct efm32gg11b820::crypto0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub wac: WAC,
    pub cmd: CMD,
    pub status: STATUS,
    pub dstatus: DSTATUS,
    pub cstatus: CSTATUS,
    pub key: KEY,
    pub keybuf: KEYBUF,
    pub seqctrl: SEQCTRL,
    pub seqctrlb: SEQCTRLB,
    pub if_: IF,
    pub ifs: IFS,
    pub ifc: IFC,
    pub ien: IEN,
    pub seq0: SEQ0,
    pub seq1: SEQ1,
    pub seq2: SEQ2,
    pub seq3: SEQ3,
    pub seq4: SEQ4,
    pub data0: DATA0,
    pub data1: DATA1,
    pub data2: DATA2,
    pub data3: DATA3,
    pub data0xor: DATA0XOR,
    pub data0byte: DATA0BYTE,
    pub data1byte: DATA1BYTE,
    pub data0xorbyte: DATA0XORBYTE,
    pub data0byte12: DATA0BYTE12,
    pub data0byte13: DATA0BYTE13,
    pub data0byte14: DATA0BYTE14,
    pub data0byte15: DATA0BYTE15,
    pub ddata0: DDATA0,
    pub ddata1: DDATA1,
    pub ddata2: DDATA2,
    pub ddata3: DDATA3,
    pub ddata4: DDATA4,
    pub ddata0big: DDATA0BIG,
    pub ddata0byte: DDATA0BYTE,
    pub ddata1byte: DDATA1BYTE,
    pub ddata0byte32: DDATA0BYTE32,
    pub qdata0: QDATA0,
    pub qdata1: QDATA1,
    pub qdata1big: QDATA1BIG,
    pub qdata0byte: QDATA0BYTE,
    pub qdata1byte: QDATA1BYTE,
    // some fields omitted
}

Register block

Fields

ctrl: CTRL

0x00 - Control Register

wac: WAC

0x04 - Wide Arithmetic Configuration

cmd: CMD

0x08 - Command Register

status: STATUS

0x10 - Status Register

dstatus: DSTATUS

0x14 - Data Status Register

cstatus: CSTATUS

0x18 - Control Status Register

key: KEY

0x20 - KEY Register Access

keybuf: KEYBUF

0x24 - KEY Buffer Register Access

seqctrl: SEQCTRL

0x30 - Sequence Control

seqctrlb: SEQCTRLB

0x34 - Sequence Control B

if_: IF

0x40 - AES Interrupt Flags

ifs: IFS

0x44 - Interrupt Flag Set Register

ifc: IFC

0x48 - Interrupt Flag Clear Register

ien: IEN

0x4c - Interrupt Enable Register

seq0: SEQ0

0x50 - Sequence Register 0

seq1: SEQ1

0x54 - Sequence Register 1

seq2: SEQ2

0x58 - Sequence Register 2

seq3: SEQ3

0x5c - Sequence Register 3

seq4: SEQ4

0x60 - Sequence Register 4

data0: DATA0

0x80 - DATA0 Register Access

data1: DATA1

0x84 - DATA1 Register Access

data2: DATA2

0x88 - DATA2 Register Access

data3: DATA3

0x8c - DATA3 Register Access

data0xor: DATA0XOR

0xa0 - DATA0XOR Register Access

data0byte: DATA0BYTE

0xb0 - DATA0 Register Byte Access

data1byte: DATA1BYTE

0xb4 - DATA1 Register Byte Access

data0xorbyte: DATA0XORBYTE

0xbc - DATA0 Register Byte XOR Access

data0byte12: DATA0BYTE12

0xc0 - DATA0 Register Byte 12 Access

data0byte13: DATA0BYTE13

0xc4 - DATA0 Register Byte 13 Access

data0byte14: DATA0BYTE14

0xc8 - DATA0 Register Byte 14 Access

data0byte15: DATA0BYTE15

0xcc - DATA0 Register Byte 15 Access

ddata0: DDATA0

0x100 - DDATA0 Register Access

ddata1: DDATA1

0x104 - DDATA1 Register Access

ddata2: DDATA2

0x108 - DDATA2 Register Access

ddata3: DDATA3

0x10c - DDATA3 Register Access

ddata4: DDATA4

0x110 - DDATA4 Register Access

ddata0big: DDATA0BIG

0x130 - DDATA0 Register Big Endian Access

ddata0byte: DDATA0BYTE

0x140 - DDATA0 Register Byte Access

ddata1byte: DDATA1BYTE

0x144 - DDATA1 Register Byte Access

ddata0byte32: DDATA0BYTE32

0x148 - DDATA0 Register Byte 32 Access

qdata0: QDATA0

0x180 - QDATA0 Register Access

qdata1: QDATA1

0x184 - QDATA1 Register Access

qdata1big: QDATA1BIG

0x1a4 - QDATA1 Register Big Endian Access

qdata0byte: QDATA0BYTE

0x1c0 - QDATA0 Register Byte Access

qdata1byte: QDATA1BYTE

0x1c4 - QDATA1 Register Byte Access

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