[][src]Type Definition efm32gg11b820::can1::ctrl::R

type R = R<u32, CTRL>;

Reader of register CTRL

Implementations

impl R[src]

pub fn init(&self) -> INIT_R[src]

Bit 0 - Initialize

pub fn ie(&self) -> IE_R[src]

Bit 1 - Module Interrupt Enable

pub fn sie(&self) -> SIE_R[src]

Bit 2 - Status Change Interrupt Enable

pub fn eie(&self) -> EIE_R[src]

Bit 3 - Error Interrupt Enable

pub fn dar(&self) -> DAR_R[src]

Bit 5 - Disable Automatic Retransmission

pub fn cce(&self) -> CCE_R[src]

Bit 6 - Configuration Change Enable

pub fn test(&self) -> TEST_R[src]

Bit 7 - Test Mode Enable Write Access to the Test Register is Enabled By Setting Bit Test in the CAN Control Register