[][src]Type Definition efm32gg11b820::can0::mir0_cmdmask::W

type W = W<u32, MIR0_CMDMASK>;

Writer for register MIR0_CMDMASK

Implementations

impl W[src]

pub fn datab(&mut self) -> DATAB_W<'_>[src]

Bit 0 - CC Channel Mode

pub fn dataa(&mut self) -> DATAA_W<'_>[src]

Bit 1 - Access Data Bytes 0-3

pub fn txrqstnewdat(&mut self) -> TXRQSTNEWDAT_W<'_>[src]

Bit 2 - Transmission Request Bit/ New Data Bit

pub fn clrintpnd(&mut self) -> CLRINTPND_W<'_>[src]

Bit 3 - Clear Interrupt Pending Bit

pub fn control(&mut self) -> CONTROL_W<'_>[src]

Bit 4 - Access Control Bits

pub fn arbacc(&mut self) -> ARBACC_W<'_>[src]

Bit 5 - Access Arbitration Bits

pub fn maskacc(&mut self) -> MASKACC_W<'_>[src]

Bit 6 - Access Mask Bits

pub fn wrrd(&mut self) -> WRRD_W<'_>[src]

Bit 7 - Write/Read RAM