eeric_core/rv_core/instruction/executor/v/
vwmaccu.rs

1use crate::rv_core::instruction::executor::prelude::*;
2
3pub fn vv(
4    Opmvv {
5        dest: vd,
6        vs1,
7        vs2,
8        vm,
9    }: Opmvv,
10    v: &mut VectorContext<'_>,
11) -> Result<(), String> {
12    let vreg = izip!(
13        v.get(vs1).iter_eew(),
14        v.get(vs2).iter_eew(),
15        v.get_wide(vd)?.iter_eew()
16    )
17    .masked_map(
18        v.default_mask(vm),
19        v.get_wide(vd)?.iter_eew(),
20        |(vs1, vs2, vd)| (vs2 as u128).wrapping_mul(vs1 as u128).wrapping_add(vd),
21    )
22    .collect_with_wide_eew(v.vec_engine.sew);
23
24    v.apply(vd, vreg);
25
26    Ok(())
27}
28
29pub fn vx(
30    Opmvx {
31        dest: vd,
32        rs1,
33        vs2,
34        vm,
35    }: Opmvx,
36    v: &mut VectorContext<'_>,
37    x: &IntegerRegisters,
38) -> Result<(), String> {
39    let vreg = izip!(v.get(vs2).iter_eew(), v.get_wide(vd)?.iter_eew())
40        .masked_map(
41            v.default_mask(vm),
42            v.get_wide(vd)?.iter_eew(),
43            |(vs2, vd)| (vs2 as u128).wrapping_mul(x[rs1] as u128).wrapping_add(vd),
44        )
45        .collect_with_wide_eew(v.vec_engine.sew);
46
47    v.apply(vd, vreg);
48
49    Ok(())
50}