[][src]Enum e310x::qspi0::fmt::DIR_A

pub enum DIR_A {
    RX,
    TX,
}

SPI I/O direction

Value on reset: 0

Variants

RX

0: For dual and quad protocols, the DQ pins are tri-stated. For the single protocol, the DQ0 pin is driven with the transmit data as normal.

TX

1: The receive FIFO is not populated.

Trait Implementations

impl Clone for DIR_A[src]

impl Copy for DIR_A[src]

impl Debug for DIR_A[src]

impl From<DIR_A> for bool[src]

impl PartialEq<DIR_A> for DIR_A[src]

impl StructuralPartialEq for DIR_A[src]

Auto Trait Implementations

impl Send for DIR_A

impl Sync for DIR_A

impl Unpin for DIR_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.