use super::instruction_id;
use crate::endian::write_u16_le;
use crate::{bus::StatusPacket, Bus, Response, TransferError};
impl<ReadBuffer, WriteBuffer> Bus<ReadBuffer, WriteBuffer>
where
ReadBuffer: AsRef<[u8]> + AsMut<[u8]>,
WriteBuffer: AsRef<[u8]> + AsMut<[u8]>,
{
fn read_raw(&mut self, motor_id: u8, address: u16, count: u16) -> Result<StatusPacket<'_>, TransferError> {
let response = self.transfer_single(motor_id, instruction_id::READ, 4, count, |buffer| {
write_u16_le(&mut buffer[0..], address);
write_u16_le(&mut buffer[2..], count);
})?;
crate::error::InvalidParameterCount::check(response.parameters().len(), count.into()).map_err(crate::ReadError::from)?;
Ok(response)
}
pub fn read(&mut self, motor_id: u8, address: u16, count: u16) -> Result<Response<Vec<u8>>, TransferError> {
let response = self.read_raw(motor_id, address, count)?;
Ok(response.into())
}
pub fn read_u8(&mut self, motor_id: u8, address: u16) -> Result<Response<u8>, TransferError> {
let response = self.read_raw(motor_id, address, 1)?;
Ok(response.try_into()?)
}
pub fn read_u16(&mut self, motor_id: u8, address: u16) -> Result<Response<u16>, TransferError> {
let response = self.read_raw(motor_id, address, 2)?;
Ok(response.try_into()?)
}
pub fn read_u32(&mut self, motor_id: u8, address: u16) -> Result<Response<u32>, TransferError> {
let response = self.read_raw(motor_id, address, 4)?;
Ok(response.try_into()?)
}
}