Struct dw1000::ll::DW1000

pub struct DW1000<SPI, CS> { /* fields omitted */ }

Entry point to the DW1000 driver's low-level API

Please consider using hl::DW1000 instead.

Methods

impl<SPI, CS> DW1000<SPI, CS>

pub fn new(spi: SPI, chip_select: CS) -> Self

Create a new instance of DW1000

Requires the SPI peripheral and the chip select pin that are connected to the DW1000.

impl<SPI, CS> DW1000<SPI, CS>

pub fn dev_id(&mut self) -> RegAccessor<DEV_ID, SPI, CS>

Device identifier

pub fn eui(&mut self) -> RegAccessor<EUI, SPI, CS>

Extended Unique Identifier

pub fn panadr(&mut self) -> RegAccessor<PANADR, SPI, CS>

PAN Identifier and Short Address

pub fn sys_cfg(&mut self) -> RegAccessor<SYS_CFG, SPI, CS>

System Configuration

pub fn sys_time(&mut self) -> RegAccessor<SYS_TIME, SPI, CS>

System Time Counter

pub fn tx_fctrl(&mut self) -> RegAccessor<TX_FCTRL, SPI, CS>

TX Frame Control

pub fn dx_time(&mut self) -> RegAccessor<DX_TIME, SPI, CS>

Delayed Send or Receive Time

pub fn sys_ctrl(&mut self) -> RegAccessor<SYS_CTRL, SPI, CS>

System Control Register

pub fn sys_mask(&mut self) -> RegAccessor<SYS_MASK, SPI, CS>

System Event Mask Register

pub fn sys_status(&mut self) -> RegAccessor<SYS_STATUS, SPI, CS>

System Event Status Register

pub fn rx_finfo(&mut self) -> RegAccessor<RX_FINFO, SPI, CS>

RX Frame Information

pub fn rx_time(&mut self) -> RegAccessor<RX_TIME, SPI, CS>

Receive Time Stamp

pub fn tx_time(&mut self) -> RegAccessor<TX_TIME, SPI, CS>

Transmit Time Stamp

pub fn tx_antd(&mut self) -> RegAccessor<TX_ANTD, SPI, CS>

TX Antenna Delay

pub fn sys_state(&mut self) -> RegAccessor<SYS_STATE, SPI, CS>

System State information

pub fn tx_power(&mut self) -> RegAccessor<TX_POWER, SPI, CS>

TX Power Control

pub fn chan_ctrl(&mut self) -> RegAccessor<CHAN_CTRL, SPI, CS>

Channel Control Register

pub fn sfd_length(&mut self) -> RegAccessor<SFD_LENGTH, SPI, CS>

This is the length of the SFD sequence used when the data rate is 850kbps and higher.

pub fn agc_tune1(&mut self) -> RegAccessor<AGC_TUNE1, SPI, CS>

AGC Tuning register 1

pub fn agc_tune2(&mut self) -> RegAccessor<AGC_TUNE2, SPI, CS>

AGC Tuning register 2

pub fn ec_ctrl(&mut self) -> RegAccessor<EC_CTRL, SPI, CS>

External Clock Sync Counter Config

pub fn gpio_mode(&mut self) -> RegAccessor<GPIO_MODE, SPI, CS>

GPIO Mode Control Register

pub fn gpio_dir(&mut self) -> RegAccessor<GPIO_DIR, SPI, CS>

GPIO Direction Control Register

pub fn gpio_dout(&mut self) -> RegAccessor<GPIO_DOUT, SPI, CS>

GPIO Data Output register

pub fn gpio_irqe(&mut self) -> RegAccessor<GPIO_IRQE, SPI, CS>

GPIO Interrupt Enable

pub fn gpio_isen(&mut self) -> RegAccessor<GPIO_ISEN, SPI, CS>

GPIO Interrupt Sense Selection

pub fn gpio_imode(&mut self) -> RegAccessor<GPIO_IMODE, SPI, CS>

GPIO Interrupt Mode (Level / Edge)

pub fn gpio_ibes(&mut self) -> RegAccessor<GPIO_IBES, SPI, CS>

GPIO Interrupt “Both Edge” Select

pub fn gpio_iclr(&mut self) -> RegAccessor<GPIO_ICLR, SPI, CS>

GPIO Interrupt Latch Clear

pub fn gpio_idbe(&mut self) -> RegAccessor<GPIO_IDBE, SPI, CS>

GPIO Interrupt De-bounce Enable

pub fn gpio_raw(&mut self) -> RegAccessor<GPIO_RAW, SPI, CS>

GPIO raw state

pub fn drx_tune0b(&mut self) -> RegAccessor<DRX_TUNE0B, SPI, CS>

Digital Tuning Register 0b

pub fn drx_tune1a(&mut self) -> RegAccessor<DRX_TUNE1A, SPI, CS>

Digital Tuning Register 1a

pub fn drx_tune1b(&mut self) -> RegAccessor<DRX_TUNE1B, SPI, CS>

Digital Tuning Register 1b

pub fn drx_tune2(&mut self) -> RegAccessor<DRX_TUNE2, SPI, CS>

Digital Tuning Register 2

pub fn drx_sfdtoc(&mut self) -> RegAccessor<DRX_SFDTOC, SPI, CS>

SFD timeout

pub fn drx_pretoc(&mut self) -> RegAccessor<DRX_PRETOC, SPI, CS>

Preamble detection timeou

pub fn drx_tune4h(&mut self) -> RegAccessor<DRX_TUNE4H, SPI, CS>

Digital Tuning Register 4h

pub fn dxr_car_int(&mut self) -> RegAccessor<DRX_CAR_INT, SPI, CS>

Carrier Recovery Integrator Register

pub fn rxpacc_nosat(&mut self) -> RegAccessor<RXPACC_NOSAT, SPI, CS>

Digital debug register. Unsaturated accumulated preamble symbols.

pub fn rf_rxctrlh(&mut self) -> RegAccessor<RF_RXCTRLH, SPI, CS>

Analog RX Control Register

pub fn rf_txctrl(&mut self) -> RegAccessor<RF_TXCTRL, SPI, CS>

Analog TX Control Register

pub fn ldotune(&mut self) -> RegAccessor<LDOTUNE, SPI, CS>

LDO voltage tuning parameter

pub fn tc_pgdelay(&mut self) -> RegAccessor<TC_PGDELAY, SPI, CS>

Pulse Generator Delay

pub fn fs_pllcfg(&mut self) -> RegAccessor<FS_PLLCFG, SPI, CS>

Frequency synth - PLL configuration

pub fn fs_plltune(&mut self) -> RegAccessor<FS_PLLTUNE, SPI, CS>

Frequency synth - PLL Tuning

pub fn otp_addr(&mut self) -> RegAccessor<OTP_ADDR, SPI, CS>

OTP Address

pub fn otp_ctrl(&mut self) -> RegAccessor<OTP_CTRL, SPI, CS>

OTP Control

pub fn otp_rdat(&mut self) -> RegAccessor<OTP_RDAT, SPI, CS>

OTP Read Data

pub fn lde_cfg1(&mut self) -> RegAccessor<LDE_CFG1, SPI, CS>

LDE Configuration Register 1

pub fn lde_rxantd(&mut self) -> RegAccessor<LDE_RXANTD, SPI, CS>

RX Antenna Delay

pub fn lde_cfg2(&mut self) -> RegAccessor<LDE_CFG2, SPI, CS>

LDE Configuration Register 2

pub fn evc_ctrl(&mut self) -> RegAccessor<EVC_CTRL, SPI, CS>

Event Counter Control

pub fn evc_hpw(&mut self) -> RegAccessor<EVC_HPW, SPI, CS>

Half Period Warning Counter

pub fn evc_tpw(&mut self) -> RegAccessor<EVC_TPW, SPI, CS>

TX Power-Up Warning Counter

pub fn pmsc_ctrl0(&mut self) -> RegAccessor<PMSC_CTRL0, SPI, CS>

PMSC Control Register 0

pub fn pmsc_ctrl1(&mut self) -> RegAccessor<PMSC_CTRL1, SPI, CS>

PMSC Control Register 1

pub fn pmsc_ledc(&mut self) -> RegAccessor<PMSC_LEDC, SPI, CS>

PMSC LED Control Register

impl<SPI, CS> DW1000<SPI, CS>

pub fn tx_buffer(&mut self) -> RegAccessor<TX_BUFFER, SPI, CS>

Transmit Data Buffer

impl<SPI, CS> DW1000<SPI, CS>

pub fn rx_buffer(&mut self) -> RegAccessor<RX_BUFFER, SPI, CS>

Receive Data Buffer