Struct cortex_m::peripheral::tpiu::Registers

pub struct Registers {
    pub sspsr: RO<u32>,
    pub cspsr: RW<u32>,
    pub acpr: RW<u32>,
    pub sppr: RW<u32>,
    pub lar: WO<u32>,
    pub lsr: RO<u32>,
    pub _type: RO<u32>,
    // some fields omitted
}

Registers

Fields

sspsr: RO<u32>

Supported Parallel Port Sizes

cspsr: RW<u32>

Current Parallel Port Size

acpr: RW<u32>

Asynchronous Clock Prescaler

sppr: RW<u32>

Selected Pin Control

lar: WO<u32>

Lock Access

lsr: RO<u32>

Lock Status

_type: RO<u32>

TPIU Type