Enum cortex_a::registers::SCTLR_EL1::C::Value

#[repr(u64)]
pub enum Value {
    NonCacheable,
    Cacheable,
}

Cacheability control, for data accesses.

0 All data access to Normal memory from EL0 and EL1, and all Normal memory accesses to the EL1&0 stage 1 translation tables, are Non-cacheable for all levels of data and unified cache.

1 This control has no effect on the Cacheability of:

• Data access to Normal memory from EL0 and EL1.
• Normal memory accesses to the EL1&0 stage 1 translation tables.

When the value of the HCR_EL2.DC bit is 1, the PE ignores SCLTR.C. This means that Non-secure EL0 and Non-secure EL1 data accesses to Normal memory are Cacheable.

When ARMv8.1-VHE is implemented, and the value of HCR_EL2.{E2H, TGE} is {1, 1}, this bit has no effect on the PE.

When this register has an architecturally-defined reset value, this field resets to 0.

Variants

NonCacheable

Cacheable

Trait Implementations

impl Clone for Value

fn clone(&self) -> Value

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl From<Value> for FieldValue<u64, Register>

fn from(v: Value) -> Self

Converts to this type from the input type.

impl PartialEq<Value> for Value

fn eq(&self, other: &Value) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl TryFromValue<u64> for Value

type EnumType = Value

fn try_from_value(v: u64) -> Option<Self::EnumType>

impl Copy for Value

impl Eq for Value

impl StructuralEq for Value

impl StructuralPartialEq for Value