Enum cortex_a::registers::CPACR_EL1::TTA::Value

#[repr(u64)]
pub enum Value {
    NoTrap,
    TrapTrace,
}

Traps EL0 and EL1 System register accesses to all implemented trace registers from both Execution states to EL1, or to EL2 when it is implemented and enabled in the current Security state and HCR_EL2.TGE is 1, as follows:

• In AArch64 state, accesses to trace registers are trapped, reported using ESR_ELx.EC value 0x18.

• In AArch32 state, MRC and MCR accesses to trace registers are trapped, reported using ESR_ELx.EC value 0x05.

• In AArch32 state, MCR and MCRR accesses to trace registers are trapped, reported using ESR_ELx.EC value 0x0C.

System register accesses to the trace registers can have side-effects. When a System register access is trapped, any side-effects that are normally associated with the access do not occur before the exception is taken.

If System register access to the trace functionality is not implemented, this bit is considered reserved.

On a Warm reset, this field resets to an undefined value.

Variants

NoTrap

This control does not cause any instructions to be trapped.

TrapTrace

This control causes EL0 and EL1 System register accesses to all implemented trace registers to be trapped.

Trait Implementations

impl TryFromValue<u64> for Value

type EnumType = Value

fn try_from(v: u64) -> Option<Self::EnumType>