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Endianness of data accesses at EL0.
0 Explicit data accesses at EL0 are little-endian.
1 Explicit data accesses at EL0 are big-endian.
If an implementation only supports Little-endian accesses at EL0 then this bit is RES 0. This option is not permitted when SCTLR_EL1.EE is RES 1.
If an implementation only supports Big-endian accesses at EL0 then this bit is RES 1. This option is not permitted when SCTLR_EL1.EE is RES 0.
This bit has no effect on the endianness of LDTR , LDTRH , LDTRSH , LDTRSW , STTR , and STTRH instructions executed at EL1.
When ARMv8.1-VHE is implemented, and the value of HCR_EL2.{E2H, TGE} is {1, 1}, this bit has no effect on execution at EL0.
Enums
Endianness of data accesses at EL0.