Enum cortex_a::registers::SCTLR_EL1::EE::Value

#[repr(u64)]
pub enum Value {
    LittleEndian,
    BigEndian,
}

Endianness of data accesses at EL1, and stage 1 translation table walks in the EL1&0 translation regime.

0 Explicit data accesses at EL1, and stage 1 translation table walks in the EL1&0 translation regime are little-endian. 1 Explicit data accesses at EL1, and stage 1 translation table walks in the EL1&0 translation regime are big-endian.

If an implementation does not provide Big-endian support at Exception Levels higher than EL0, this bit is RES 0.

If an implementation does not provide Little-endian support at Exception Levels higher than EL0, this bit is RES 1.

The EE bit is permitted to be cached in a TLB.

When ARMv8.1-VHE is implemented, and the value of HCR_EL2.{E2H, TGE} is {1, 1}, this bit has no effect on the PE.

Variants

LittleEndian

BigEndian

Trait Implementations

impl TryFromValue<u64> for Value

type EnumType = Value

fn try_from(v: u64) -> Option<Self::EnumType>