Module cortex_a::registers::TCR_EL2::PS [−][src]
Expand description
Physical Address Size.
000 32 bits, 4GiB. 001 36 bits, 64GiB. 010 40 bits, 1TiB. 011 42 bits, 4TiB. 100 44 bits, 16TiB. 101 48 bits, 256TiB. 110 52 bits, 4PB
Other values are reserved.
The reserved values behave in the same way as the 101 or 110 encoding, but software must not rely on this property as the behavior of the reserved values might change in a future revision of the architecture.
The value 110 is permitted only if ARMv8.2-LPA is implemented and the translation granule size is 64KiB.
In an implementation that supports 52-bit PAs, if the value of this field is not 110 , then bits[51:48] of every translation table base address for the stage of translation controlled by TCR_EL2 are 0000.
Enums
Physical Address Size.