[−][src]Enum cortex_a::regs::SCTLR_EL1::NAA::Value

#[repr(u64)]pub enum Value {
    Disable,
    Enable,
}

Non-aligned access. This bit controls generation of Alignment faults at EL1 and EL0 under certain conditions.

LDAPR, LDAPRH, LDAPUR, LDAPURH, LDAPURSH, LDAPURSW, LDAR, LDARH, LDLAR, LDLARH, STLLR, STLLRH, STLR, STLRH, STLUR, and STLURH will or will not generate an Alignment fault if all bytes being accessed are not within a single 16-byte quantity, aligned to 16 bytes for accesses.

Variants

Disable
Enable

Trait Implementations

impl TryFromValue<u64> for Value[src]

type EnumType = Value

Auto Trait Implementations

impl Send for Value[src]

impl Sync for Value[src]

impl Unpin for Value[src]

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.