[−][src]Enum cortex_a::regs::TCR_EL1::AS::Value
ASID Size. Defined values are:
0 8 bit - the upper 8 bits of TTBR0_EL1 and TTBR1_EL1 are ignored by hardware for every purpose except reading back the register, and are treated as if they are all zeros for when used for allocation and matching entries in the TLB. 1 16 bit - the upper 16 bits of TTBR0_EL1 and TTBR1_EL1 are used for allocation and matching in the TLB.
If the implementation has only 8 bits of ASID, this field is RES0.
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Trait Implementations
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T: 'static + ?Sized,
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T: ?Sized,
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T: ?Sized,
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The type returned in the event of a conversion error.
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