[−]Module cortex_a::regs::DAIF::I
IRQ mask bit. The possible values of this bit are:
0 Exception not masked. 1 Exception masked.
When this register has an architecturally-defined reset value, this field resets to 1.
Enums
| Value | IRQ mask bit. The possible values of this bit are: |
Constants
| CLEAR | |
| Masked | |
| SET | |
| Unmasked |