[−][src]Type Definition cc3220sf::gprcm::apllmcs_mcu_run_config0_38p4::R
type R = R<u32, APLLMCS_MCU_RUN_CONFIG0_38P4>;
Reader of register APLLMCS_MCU_RUN_CONFIG0_38P4
Implementations
impl R
[src]
pub fn apllmcs_mcu_postdiv(&self) -> APLLMCS_MCU_POSTDIV_R
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Bits 27:29 - APLLMCS_MCU_POSTDIV
pub fn apllmcs_mcu_spare(&self) -> APLLMCS_MCU_SPARE_R
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Bits 24:26 - APLLMCS_MCU_SPARE
pub fn apllmcs_mcu_run_n_38p4(&self) -> APLLMCS_MCU_RUN_N_38P4_R
[src]
Bits 16:22 - Configuration for MCU-APLLMCS : N during RUN mode. Selected if the XTAL frequency is 38.4 MHz (from Efuse)
pub fn apllmcs_mcu_run_m_38p4(&self) -> APLLMCS_MCU_RUN_M_38P4_R
[src]
Bits 8:15 - Configuration for MCU-APLLMCS : M during RUN mode. Selected if the XTAL frequency is 38.4 MHz (from Efuse)
pub fn apllmcs_mcu_run_n_7_8_38p4(&self) -> APLLMCS_MCU_RUN_N_7_8_38P4_R
[src]
Bits 0:1 - Configuration for MCU-APLLMCS : N[8:7] during RUN mode. Selected if the XTAL frequency is 38.4 MHz (From Efuse)