[−][src]Module cc3220sf::hib1p2
HIB1P2
Modules
| ana_dcdc_fsm_parameters | ANA_DCDC_FSM_PARAMETERS |
| ana_dcdc_parameters0 | ANA_DCDC_PARAMETERS0 |
| ana_dcdc_parameters1 | ANA_DCDC_PARAMETERS1 |
| ana_dcdc_parameters16 | ANA_DCDC_PARAMETERS16 |
| ana_dcdc_parameters17 | ANA_DCDC_PARAMETERS17 |
| ana_dcdc_parameters18 | ANA_DCDC_PARAMETERS18 |
| ana_dcdc_parameters19 | ANA_DCDC_PARAMETERS19 |
| ana_dcdc_parameters_override | ANA_DCDC_PARAMETERS_OVERRIDE |
| bgap_duty_cycling_exit_cfg | BGAP_DUTY_CYCLING_EXIT_CFG |
| bgap_trim_overrides | BGAP_TRIM_OVERRIDES |
| cm_osc_16m_config | CM_OSC_16M_CONFIG |
| cm_spare | CM_SPARE |
| dig_dcdc_fsm_parameters | DIG_DCDC_FSM_PARAMETERS |
| dig_dcdc_parameters0 | DIG_DCDC_PARAMETERS0 |
| dig_dcdc_parameters1 | DIG_DCDC_PARAMETERS1 |
| dig_dcdc_parameters2 | DIG_DCDC_PARAMETERS2 |
| dig_dcdc_parameters3 | DIG_DCDC_PARAMETERS3 |
| dig_dcdc_parameters4 | DIG_DCDC_PARAMETERS4 |
| dig_dcdc_parameters5 | DIG_DCDC_PARAMETERS5 |
| dig_dcdc_parameters6 | DIG_DCDC_PARAMETERS6 |
| dig_dcdc_vtrim_cfg | DIG_DCDC_VTRIM_CFG |
| efuse_read_reg0 | EFUSE_READ_REG0 |
| efuse_read_reg1 | EFUSE_READ_REG1 |
| flash_dcdc_parameters0 | FLASH_DCDC_PARAMETERS0 |
| flash_dcdc_parameters1 | FLASH_DCDC_PARAMETERS1 |
| flash_dcdc_parameters2 | FLASH_DCDC_PARAMETERS2 |
| flash_dcdc_parameters3 | FLASH_DCDC_PARAMETERS3 |
| flash_dcdc_parameters4 | FLASH_DCDC_PARAMETERS4 |
| flash_dcdc_parameters5 | FLASH_DCDC_PARAMETERS5 |
| flash_dcdc_parameters6 | FLASH_DCDC_PARAMETERS6 |
| flash_dcdc_parameters8 | FLASH_DCDC_PARAMETERS8 |
| flash_dcdc_parameters_override | FLASH_DCDC_PARAMETERS_OVERRIDE |
| hib_rtc_timer_lsw_1p2 | HIB_RTC_TIMER_LSW_1P2 |
| hib_rtc_timer_msw_1p2 | HIB_RTC_TIMER_MSW_1P2 |
| hib_timer_rtc_gts_timestamp_lsw | HIB_TIMER_RTC_GTS_TIMESTAMP_LSW |
| hib_timer_rtc_gts_timestamp_msw | HIB_TIMER_RTC_GTS_TIMESTAMP_MSW |
| hib_timer_rtc_wup_timestamp_lsw | HIB_TIMER_RTC_WUP_TIMESTAMP_LSW |
| hib_timer_rtc_wup_timestamp_msw | HIB_TIMER_RTC_WUP_TIMESTAMP_MSW |
| hib_timer_sync_calib_cfg0 | HIB_TIMER_SYNC_CALIB_CFG0 |
| hib_timer_sync_calib_cfg1 | HIB_TIMER_SYNC_CALIB_CFG1 |
| hib_timer_sync_cfg2 | HIB_TIMER_SYNC_CFG2 |
| hib_timer_sync_tsf_adj_val | HIB_TIMER_SYNC_TSF_ADJ_VAL |
| hib_timer_sync_tsf_curr_val_lsw | HIB_TIMER_SYNC_TSF_CURR_VAL_LSW |
| hib_timer_sync_tsf_curr_val_msw | HIB_TIMER_SYNC_TSF_CURR_VAL_MSW |
| hib_timer_sync_wake_offset_err | HIB_TIMER_SYNC_WAKE_OFFSET_ERR |
| mem_ana_dcdc_clk_config | MEM_ANA_DCDC_CLK_CONFIG |
| mem_bgap_duty_cycling_enable_override | MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE |
| mem_cm_test_mode | MEM_CM_TEST_MODE |
| mem_dig_dcdc_clk_config | MEM_DIG_DCDC_CLK_CONFIG |
| mem_flash_dcdc_clk_config | MEM_FLASH_DCDC_CLK_CONFIG |
| mem_hib_fsm_debug | MEM_HIB_FSM_DEBUG |
| mem_pa_dcdc_clk_config | MEM_PA_DCDC_CLK_CONFIG |
| mem_pa_dcdc_ov_uv_status | MEM_PA_DCDC_OV_UV_STATUS |
| mem_sldo_vnwa_override | MEM_SLDO_VNWA_OVERRIDE |
| mem_sldo_vnwa_sw_ctrl | MEM_SLDO_VNWA_SW_CTRL |
| mem_sldo_weak_process | MEM_SLDO_WEAK_PROCESS |
| pmbist_parameters0 | PMBIST_PARAMETERS0 |
| pmbist_parameters1 | PMBIST_PARAMETERS1 |
| pmbist_parameters2 | PMBIST_PARAMETERS2 |
| pmbist_parameters3 | PMBIST_PARAMETERS3 |
| por_test_ctrl | POR_TEST_CTRL |
| porpol_spare | PORPOL_SPARE |
| sop_sense_value | SOP_SENSE_VALUE |
| sram_ska_ldo_fsm_parameters | SRAM_SKA_LDO_FSM_PARAMETERS |
| sram_ska_ldo_parameters0 | SRAM_SKA_LDO_PARAMETERS0 |
| sram_ska_ldo_parameters1 | SRAM_SKA_LDO_PARAMETERS1 |
Structs
| RegisterBlock | Register block |
Type Definitions
| ANA_DCDC_FSM_PARAMETERS | ANA_DCDC_FSM_PARAMETERS |
| ANA_DCDC_PARAMETERS0 | ANA_DCDC_PARAMETERS0 |
| ANA_DCDC_PARAMETERS1 | ANA_DCDC_PARAMETERS1 |
| ANA_DCDC_PARAMETERS16 | ANA_DCDC_PARAMETERS16 |
| ANA_DCDC_PARAMETERS17 | ANA_DCDC_PARAMETERS17 |
| ANA_DCDC_PARAMETERS18 | ANA_DCDC_PARAMETERS18 |
| ANA_DCDC_PARAMETERS19 | ANA_DCDC_PARAMETERS19 |
| ANA_DCDC_PARAMETERS_OVERRIDE | ANA_DCDC_PARAMETERS_OVERRIDE |
| BGAP_DUTY_CYCLING_EXIT_CFG | BGAP_DUTY_CYCLING_EXIT_CFG |
| BGAP_TRIM_OVERRIDES | BGAP_TRIM_OVERRIDES |
| CM_OSC_16M_CONFIG | CM_OSC_16M_CONFIG |
| CM_SPARE | CM_SPARE |
| DIG_DCDC_FSM_PARAMETERS | DIG_DCDC_FSM_PARAMETERS |
| DIG_DCDC_PARAMETERS0 | DIG_DCDC_PARAMETERS0 |
| DIG_DCDC_PARAMETERS1 | DIG_DCDC_PARAMETERS1 |
| DIG_DCDC_PARAMETERS2 | DIG_DCDC_PARAMETERS2 |
| DIG_DCDC_PARAMETERS3 | DIG_DCDC_PARAMETERS3 |
| DIG_DCDC_PARAMETERS4 | DIG_DCDC_PARAMETERS4 |
| DIG_DCDC_PARAMETERS5 | DIG_DCDC_PARAMETERS5 |
| DIG_DCDC_PARAMETERS6 | DIG_DCDC_PARAMETERS6 |
| DIG_DCDC_VTRIM_CFG | DIG_DCDC_VTRIM_CFG |
| EFUSE_READ_REG0 | EFUSE_READ_REG0 |
| EFUSE_READ_REG1 | EFUSE_READ_REG1 |
| FLASH_DCDC_PARAMETERS0 | FLASH_DCDC_PARAMETERS0 |
| FLASH_DCDC_PARAMETERS1 | FLASH_DCDC_PARAMETERS1 |
| FLASH_DCDC_PARAMETERS2 | FLASH_DCDC_PARAMETERS2 |
| FLASH_DCDC_PARAMETERS3 | FLASH_DCDC_PARAMETERS3 |
| FLASH_DCDC_PARAMETERS4 | FLASH_DCDC_PARAMETERS4 |
| FLASH_DCDC_PARAMETERS5 | FLASH_DCDC_PARAMETERS5 |
| FLASH_DCDC_PARAMETERS6 | FLASH_DCDC_PARAMETERS6 |
| FLASH_DCDC_PARAMETERS8 | FLASH_DCDC_PARAMETERS8 |
| FLASH_DCDC_PARAMETERS_OVERRIDE | FLASH_DCDC_PARAMETERS_OVERRIDE |
| HIB_RTC_TIMER_LSW_1P2 | HIB_RTC_TIMER_LSW_1P2 |
| HIB_RTC_TIMER_MSW_1P2 | HIB_RTC_TIMER_MSW_1P2 |
| HIB_TIMER_RTC_GTS_TIMESTAMP_LSW | HIB_TIMER_RTC_GTS_TIMESTAMP_LSW |
| HIB_TIMER_RTC_GTS_TIMESTAMP_MSW | HIB_TIMER_RTC_GTS_TIMESTAMP_MSW |
| HIB_TIMER_RTC_WUP_TIMESTAMP_LSW | HIB_TIMER_RTC_WUP_TIMESTAMP_LSW |
| HIB_TIMER_RTC_WUP_TIMESTAMP_MSW | HIB_TIMER_RTC_WUP_TIMESTAMP_MSW |
| HIB_TIMER_SYNC_CALIB_CFG0 | HIB_TIMER_SYNC_CALIB_CFG0 |
| HIB_TIMER_SYNC_CALIB_CFG1 | HIB_TIMER_SYNC_CALIB_CFG1 |
| HIB_TIMER_SYNC_CFG2 | HIB_TIMER_SYNC_CFG2 |
| HIB_TIMER_SYNC_TSF_ADJ_VAL | HIB_TIMER_SYNC_TSF_ADJ_VAL |
| HIB_TIMER_SYNC_TSF_CURR_VAL_LSW | HIB_TIMER_SYNC_TSF_CURR_VAL_LSW |
| HIB_TIMER_SYNC_TSF_CURR_VAL_MSW | HIB_TIMER_SYNC_TSF_CURR_VAL_MSW |
| HIB_TIMER_SYNC_WAKE_OFFSET_ERR | HIB_TIMER_SYNC_WAKE_OFFSET_ERR |
| MEM_ANA_DCDC_CLK_CONFIG | MEM_ANA_DCDC_CLK_CONFIG |
| MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE | MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE |
| MEM_CM_TEST_MODE | MEM_CM_TEST_MODE |
| MEM_DIG_DCDC_CLK_CONFIG | MEM_DIG_DCDC_CLK_CONFIG |
| MEM_FLASH_DCDC_CLK_CONFIG | MEM_FLASH_DCDC_CLK_CONFIG |
| MEM_HIB_FSM_DEBUG | MEM_HIB_FSM_DEBUG |
| MEM_PA_DCDC_CLK_CONFIG | MEM_PA_DCDC_CLK_CONFIG |
| MEM_PA_DCDC_OV_UV_STATUS | MEM_PA_DCDC_OV_UV_STATUS |
| MEM_SLDO_VNWA_OVERRIDE | MEM_SLDO_VNWA_OVERRIDE |
| MEM_SLDO_VNWA_SW_CTRL | MEM_SLDO_VNWA_SW_CTRL |
| MEM_SLDO_WEAK_PROCESS | MEM_SLDO_WEAK_PROCESS |
| PMBIST_PARAMETERS0 | PMBIST_PARAMETERS0 |
| PMBIST_PARAMETERS1 | PMBIST_PARAMETERS1 |
| PMBIST_PARAMETERS2 | PMBIST_PARAMETERS2 |
| PMBIST_PARAMETERS3 | PMBIST_PARAMETERS3 |
| PORPOL_SPARE | PORPOL_SPARE |
| POR_TEST_CTRL | POR_TEST_CTRL |
| SOP_SENSE_VALUE | SOP_SENSE_VALUE |
| SRAM_SKA_LDO_FSM_PARAMETERS | SRAM_SKA_LDO_FSM_PARAMETERS |
| SRAM_SKA_LDO_PARAMETERS0 | SRAM_SKA_LDO_PARAMETERS0 |
| SRAM_SKA_LDO_PARAMETERS1 | SRAM_SKA_LDO_PARAMETERS1 |