[][src]Type Definition cc3220sf::stackdie_ctrl::STK_CLK_EN

type STK_CLK_EN = Reg<u32, _STK_CLK_EN>;

Can be written only by base processor. Controls the enable pin of the cgcs for the clocks going to CM3 dft ctrl block and Sram.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see stk_clk_en module

Trait Implementations

impl Readable for STK_CLK_EN[src]

read() method returns stk_clk_en::R reader structure

impl ResetValue for STK_CLK_EN[src]

Register STK_CLK_EN reset()'s with value 0

type Type = u32

Register size

impl Writable for STK_CLK_EN[src]

write(|w| ..) method takes stk_clk_en::W writer structure