[−][src]Type Definition cc3220sf::stackdie_ctrl::RDSM_CFG_CPU
type RDSM_CFG_CPU = Reg<u32, _RDSM_CFG_CPU>;
Read State Machine timing configuration register. Generally Bit 4 and 3 will be identical. For stacked die always 43 are 0 and 6:5 == 1 for 120Mhz.
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see rdsm_cfg_cpu module
Trait Implementations
impl Readable for RDSM_CFG_CPU
[src]
read()
method returns rdsm_cfg_cpu::R reader structure
impl ResetValue for RDSM_CFG_CPU
[src]
Register RDSM_CFG_CPU reset()
's with value 0
impl Writable for RDSM_CFG_CPU
[src]
write(|w| ..)
method takes rdsm_cfg_cpu::W writer structure