Type Definition cc2538::rfcore_xreg::srcexten0::W

type W = W<u32, SRCEXTEN0>;

Writer for register SRCEXTEN0

Methods

impl W

pub fn reserved32(&mut self) -> RESERVED32_W

Bits 8:31 - 31:8] This register is 8 bits in a 32-bit address space.

pub fn ext_addr_en(&mut self) -> EXT_ADDR_EN_W

Bits 0:7 - 7:0] 7:0 part of the 24-bit word EXT_ADDR_EN that enables or disables source address matching for each of the 12 extended address table entries Write access: Extended address enable for table entry n (0 to 11) is mapped to EXT_ADDR_EN[2n]. All EXT_ADDR_EN[2n + 1] bits are read only. Read access: Extended address enable for table entry n (0 to 11) is mapped to EXT_ADDR_EN[2n] and EXT_ADDR_EN[2n + 1]. Optional safety feature: To ensure that an entry in the source matching table is not used while it is being updated, set the corresponding EXT_ADDR_EN bit to 0 while updating.