Type Definition cc2538::uart1::icr::W

type W = W<u32, ICR>;

Writer for register ICR

Methods

impl W

pub fn reserved16(&mut self) -> RESERVED16_W

Bits 16:31 - 31:16] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn lme5ic(&mut self) -> LME5IC_W

Bit 15 - 15:15] LIN mode edge 5 interrupt clear Writing 1 to this bit clears the LME5RIS bit in the UARTRIS register and the LME5MIS bit in the UARTMIS register.

pub fn lme1ic(&mut self) -> LME1IC_W

Bit 14 - 14:14] LIN mode edge 1 interrupt clear Writing 1 to this bit clears the LME1RIS bit in the UARTRIS register and the LME1MIS bit in the UARTMIS register.

pub fn lmsbic(&mut self) -> LMSBIC_W

Bit 13 - 13:13] LIN mode sync break interrupt clear Writing 1 to this bit clears the LMSBRIS bit in the UARTRIS register and the LMSBMIS bit in the UARTMIS register.

pub fn ninebitic(&mut self) -> NINEBITIC_W

Bit 12 - 12:12] 9-bit mode interrupt clear Writing 1 to this bit clears the 9BITRIS bit in the UARTRIS register and the 9BITMIS bit in the UARTMIS register.

pub fn reserved1(&mut self) -> RESERVED1_W

Bit 11 - 11:11] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn oeic(&mut self) -> OEIC_W

Bit 10 - 10:10] Overrun error interrupt clear Writing 1 to this bit clears the OERIS bit in the UARTRIS register and the OEMIS bit in the UARTMIS register.

pub fn beic(&mut self) -> BEIC_W

Bit 9 - 9:9] Break error interrupt clear Writing 1 to this bit clears the BERIS bit in the UARTRIS register and the BEMIS bit in the UARTMIS register.

pub fn peic(&mut self) -> PEIC_W

Bit 8 - 8:8] Parity error interrupt clear Writing 1 to this bit clears the PERIS bit in the UARTRIS register and the PEMIS bit in the UARTMIS register.

pub fn feic(&mut self) -> FEIC_W

Bit 7 - 7:7] Framing error interrupt clear Writing 1 to this bit clears the FERIS bit in the UARTRIS register and the FEMIS bit in the UARTMIS register.

pub fn rtic(&mut self) -> RTIC_W

Bit 6 - 6:6] Receive time-out interrupt clear Writing 1 to this bit clears the RTRIS bit in the UARTRIS register and the RTMIS bit in the UARTMIS register.

pub fn txic(&mut self) -> TXIC_W

Bit 5 - 5:5] Transmit interrupt clear Writing 1 to this bit clears the TXRIS bit in the UARTRIS register and the TXMIS bit in the UARTMIS register.

pub fn rxic(&mut self) -> RXIC_W

Bit 4 - 4:4] Receive interrupt clear Writing 1 to this bit clears the RXRIS bit in the UARTRIS register and the RXMIS bit in the UARTMIS register.

pub fn reserved4(&mut self) -> RESERVED4_W

Bits 0:3 - 3:0] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.