[][src]Struct cc13x2_cc26x2_hal::rfc_dbell::rfhwien::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn reserved20(&self) -> RESERVED20R[src]

Bits 20:31 - 31:20] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn ratch7(&self) -> RATCH7R[src]

Bit 19 - 19:19] Interrupt enable for RFHWIFG.RATCH7.

pub fn ratch6(&self) -> RATCH6R[src]

Bit 18 - 18:18] Interrupt enable for RFHWIFG.RATCH6.

pub fn ratch5(&self) -> RATCH5R[src]

Bit 17 - 17:17] Interrupt enable for RFHWIFG.RATCH5.

pub fn ratch4(&self) -> RATCH4R[src]

Bit 16 - 16:16] Interrupt enable for RFHWIFG.RATCH4.

pub fn ratch3(&self) -> RATCH3R[src]

Bit 15 - 15:15] Interrupt enable for RFHWIFG.RATCH3.

pub fn ratch2(&self) -> RATCH2R[src]

Bit 14 - 14:14] Interrupt enable for RFHWIFG.RATCH2.

pub fn ratch1(&self) -> RATCH1R[src]

Bit 13 - 13:13] Interrupt enable for RFHWIFG.RATCH1.

pub fn ratch0(&self) -> RATCH0R[src]

Bit 12 - 12:12] Interrupt enable for RFHWIFG.RATCH0.

pub fn rfesoft2(&self) -> RFESOFT2R[src]

Bit 11 - 11:11] Interrupt enable for RFHWIFG.RFESOFT2.

pub fn rfesoft1(&self) -> RFESOFT1R[src]

Bit 10 - 10:10] Interrupt enable for RFHWIFG.RFESOFT1.

pub fn rfesoft0(&self) -> RFESOFT0R[src]

Bit 9 - 9:9] Interrupt enable for RFHWIFG.RFESOFT0.

pub fn rfedone(&self) -> RFEDONER[src]

Bit 8 - 8:8] Interrupt enable for RFHWIFG.RFEDONE.

pub fn reserved7(&self) -> RESERVED7R[src]

Bit 7 - 7:7] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn trctk(&self) -> TRCTKR[src]

Bit 6 - 6:6] Interrupt enable for RFHWIFG.TRCTK.

pub fn mdmsoft(&self) -> MDMSOFTR[src]

Bit 5 - 5:5] Interrupt enable for RFHWIFG.MDMSOFT.

pub fn mdmout(&self) -> MDMOUTR[src]

Bit 4 - 4:4] Interrupt enable for RFHWIFG.MDMOUT.

pub fn mdmin(&self) -> MDMINR[src]

Bit 3 - 3:3] Interrupt enable for RFHWIFG.MDMIN.

pub fn mdmdone(&self) -> MDMDONER[src]

Bit 2 - 2:2] Interrupt enable for RFHWIFG.MDMDONE.

pub fn fsca(&self) -> FSCAR[src]

Bit 1 - 1:1] Interrupt enable for RFHWIFG.FSCA.

pub fn reserved0(&self) -> RESERVED0R[src]

Bit 0 - 0:0] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

Auto Trait Implementations

impl Send for R

impl Sync for R

Blanket Implementations

impl<T, U> TryFrom for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T> From for T[src]

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> Borrow for T where
    T: ?Sized
[src]

impl<T> BorrowMut for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same for T

type Output = T

Should always be Self