Module cc13x2_cc26x2_hal::pka::divmsw

PKA most-significant-word of divide remainder This register indicates the (32-bit word) address in the PKA RAM where the most significant nonzero 32-bit word of the remainder result for the basic divide and modulo operations is stored. Bits [4:0] are loaded with the bit number of the most-significant nonzero bit in the most-significant nonzero word when MS one control bit is set. For divide, modulo, and MS one reporting, this register is updated when FUNCTION.RUN bit is reset at the end of the operation. For the complex sequencer controlled operations, updating of bits [4:0] of this register with the most-significant bit location of the actual result is done near the end of the operation. The result is meaningful only if no errors were detected and that for ECC operations; this register provides information for the x-coordinate of the result point only.

Structs

MSW_ADDRESSR	Value of the field
R	Value read from the register
RESERVED11R	Value of the field
RESERVED16R	Value of the field
RESULT_IS_ZEROR	Value of the field
W	Value to write to the register
_MSW_ADDRESSW	Proxy
_RESERVED11W	Proxy
_RESERVED16W	Proxy
_RESULT_IS_ZEROW	Proxy