[][src]Module cc13x2_cc26x2_hal::cpu_scs::nvic_ipr8

Irq 32 to 35 Priority This register is used to assign a priority from 0 to 255 to each of the available interrupts. 0 is the highest priority, and 255 is the lowest. The interpretation of the Interrupt Priority Registers changes based on the setting in AIRCR.PRIGROUP.

Structs

PRI_32R

Value of the field

PRI_33R

Value of the field

PRI_34R

Value of the field

PRI_35R

Value of the field

R

Value read from the register

W

Value to write to the register

_PRI_32W

Proxy

_PRI_33W

Proxy

_PRI_34W

Proxy

_PRI_35W

Proxy