[−][src]Module cc13x2_cc26x2_hal::aux_timer2::ch0evcfg
Channel 0 Event Configuration This register configures channel function and enables event outputs. Each channel has an edge-detection circuit with memory. The circuit is: - enabled while CCACT selects a capture function and CTL.MODE is different from DIS. - flushed while CCACT selects a capture function and you change CTL.MODE from DIS to another mode. The flush action uses two AUX_SYSIF:TIMER2CLKCTL.SRC clock periods. It prevents capture events caused by expired signal values stored in the edge-detection circuit.
Structs
| EV0_GENR | Value of the field |
| EV1_GENR | Value of the field |
| EV2_GENR | Value of the field |
| EV3_GENR | Value of the field |
| R | Value read from the register |
| RESERVED8R | Value of the field |
| W | Value to write to the register |
| _CCACTW | Proxy |
| _EV0_GENW | Proxy |
| _EV1_GENW | Proxy |
| _EV2_GENW | Proxy |
| _EV3_GENW | Proxy |
| _RESERVED8W | Proxy |
Enums
| CCACTR | Possible values of the field |
| CCACTW | Values that can be written to the field |