[−][src]Struct cc13x2_cc26x2_hal::prcm::RegisterBlock

#[repr(C)]

pub struct RegisterBlock {
    pub infrclkdivr: INFRCLKDIVR,
    pub infrclkdivs: INFRCLKDIVS,
    pub infrclkdivds: INFRCLKDIVDS,
    pub vdctl: VDCTL,
    pub clkloadctl: CLKLOADCTL,
    pub rfcclkg: RFCCLKG,
    pub vimsclkg: VIMSCLKG,
    pub secdmaclkgr: SECDMACLKGR,
    pub secdmaclkgs: SECDMACLKGS,
    pub secdmaclkgds: SECDMACLKGDS,
    pub gpioclkgr: GPIOCLKGR,
    pub gpioclkgs: GPIOCLKGS,
    pub gpioclkgds: GPIOCLKGDS,
    pub gptclkgr: GPTCLKGR,
    pub gptclkgs: GPTCLKGS,
    pub gptclkgds: GPTCLKGDS,
    pub i2cclkgr: I2CCLKGR,
    pub i2cclkgs: I2CCLKGS,
    pub i2cclkgds: I2CCLKGDS,
    pub uartclkgr: UARTCLKGR,
    pub uartclkgs: UARTCLKGS,
    pub uartclkgds: UARTCLKGDS,
    pub ssiclkgr: SSICLKGR,
    pub ssiclkgs: SSICLKGS,
    pub ssiclkgds: SSICLKGDS,
    pub i2sclkgr: I2SCLKGR,
    pub i2sclkgs: I2SCLKGS,
    pub i2sclkgds: I2SCLKGDS,
    pub sysbusclkdiv: SYSBUSCLKDIV,
    pub cpuclkdiv: CPUCLKDIV,
    pub perbuscpuclkdiv: PERBUSCPUCLKDIV,
    pub perbusdmaclkdiv: PERBUSDMACLKDIV,
    pub perdmaclkdiv: PERDMACLKDIV,
    pub i2sbclksel: I2SBCLKSEL,
    pub gptclkdiv: GPTCLKDIV,
    pub i2sclkctl: I2SCLKCTL,
    pub i2smclkdiv: I2SMCLKDIV,
    pub i2sbclkdiv: I2SBCLKDIV,
    pub i2swclkdiv: I2SWCLKDIV,
    pub resetsecdma: RESETSECDMA,
    pub resetgpio: RESETGPIO,
    pub resetgpt: RESETGPT,
    pub reseti2c: RESETI2C,
    pub resetuart: RESETUART,
    pub resetssi: RESETSSI,
    pub reseti2s: RESETI2S,
    pub pdctl0: PDCTL0,
    pub pdctl0rfc: PDCTL0RFC,
    pub pdctl0serial: PDCTL0SERIAL,
    pub pdctl0periph: PDCTL0PERIPH,
    pub pdstat0: PDSTAT0,
    pub pdstat0rfc: PDSTAT0RFC,
    pub pdstat0serial: PDSTAT0SERIAL,
    pub pdstat0periph: PDSTAT0PERIPH,
    pub pdctl1: PDCTL1,
    pub pdctl1cpu: PDCTL1CPU,
    pub pdctl1rfc: PDCTL1RFC,
    pub pdctl1vims: PDCTL1VIMS,
    pub pdstat1: PDSTAT1,
    pub pdstat1bus: PDSTAT1BUS,
    pub pdstat1rfc: PDSTAT1RFC,
    pub pdstat1cpu: PDSTAT1CPU,
    pub pdstat1vims: PDSTAT1VIMS,
    pub rfcbits: RFCBITS,
    pub rfcmodesel: RFCMODESEL,
    pub rfcmodehwopt: RFCMODEHWOPT,
    pub pwrprofstat: PWRPROFSTAT,
    pub mcusramcfg: MCUSRAMCFG,
    pub ramreten: RAMRETEN,
    pub oscimsc: OSCIMSC,
    pub oscris: OSCRIS,
    pub oscicr: OSCICR,
    // some fields omitted
}

Register block

Fields

infrclkdivr: INFRCLKDIVR

0x00 - Infrastructure Clock Division Factor For Run Mode

infrclkdivs: INFRCLKDIVS

0x04 - Infrastructure Clock Division Factor For Sleep Mode

infrclkdivds: INFRCLKDIVDS

0x08 - Infrastructure Clock Division Factor For DeepSleep Mode

vdctl: VDCTL

0x0c - MCU Voltage Domain Control

clkloadctl: CLKLOADCTL

0x28 - Load PRCM Settings To CLKCTRL Power Domain

rfcclkg: RFCCLKG

0x2c - RFC Clock Gate

vimsclkg: VIMSCLKG

0x30 - VIMS Clock Gate

secdmaclkgr: SECDMACLKGR

0x3c - SEC (PKA And TRNG And CRYPTO) And UDMA Clock Gate For Run And All Modes

secdmaclkgs: SECDMACLKGS

0x40 - SEC (PKA And TRNG And CRYPTO) And UDMA Clock Gate For Sleep Mode

secdmaclkgds: SECDMACLKGDS

0x44 - SEC (PKA And TRNG and CRYPTO) And UDMA Clock Gate For Deep Sleep Mode

gpioclkgr: GPIOCLKGR

0x48 - GPIO Clock Gate For Run And All Modes

gpioclkgs: GPIOCLKGS

0x4c - GPIO Clock Gate For Sleep Mode

gpioclkgds: GPIOCLKGDS

0x50 - GPIO Clock Gate For Deep Sleep Mode

gptclkgr: GPTCLKGR

0x54 - GPT Clock Gate For Run And All Modes

gptclkgs: GPTCLKGS

0x58 - GPT Clock Gate For Sleep Mode

gptclkgds: GPTCLKGDS

0x5c - GPT Clock Gate For Deep Sleep Mode

i2cclkgr: I2CCLKGR

0x60 - I2C Clock Gate For Run And All Modes

i2cclkgs: I2CCLKGS

0x64 - I2C Clock Gate For Sleep Mode

i2cclkgds: I2CCLKGDS

0x68 - I2C Clock Gate For Deep Sleep Mode

uartclkgr: UARTCLKGR

0x6c - UART Clock Gate For Run And All Modes

uartclkgs: UARTCLKGS

0x70 - UART Clock Gate For Sleep Mode

uartclkgds: UARTCLKGDS

0x74 - UART Clock Gate For Deep Sleep Mode

ssiclkgr: SSICLKGR

0x78 - SSI Clock Gate For Run And All Modes

ssiclkgs: SSICLKGS

0x7c - SSI Clock Gate For Sleep Mode

ssiclkgds: SSICLKGDS

0x80 - SSI Clock Gate For Deep Sleep Mode

i2sclkgr: I2SCLKGR

0x84 - I2S Clock Gate For Run And All Modes

i2sclkgs: I2SCLKGS

0x88 - I2S Clock Gate For Sleep Mode

i2sclkgds: I2SCLKGDS

0x8c - I2S Clock Gate For Deep Sleep Mode

sysbusclkdiv: SYSBUSCLKDIV

0xb4 - Internal. Only to be used through TI provided API.

cpuclkdiv: CPUCLKDIV

0xb8 - Internal. Only to be used through TI provided API.

perbuscpuclkdiv: PERBUSCPUCLKDIV

0xbc - Internal. Only to be used through TI provided API.

perbusdmaclkdiv: PERBUSDMACLKDIV

0xc0 - Internal. Only to be used through TI provided API.

perdmaclkdiv: PERDMACLKDIV

0xc4 - Internal. Only to be used through TI provided API.

i2sbclksel: I2SBCLKSEL

0xc8 - I2S Clock Control

gptclkdiv: GPTCLKDIV

0xcc - GPT Scalar

i2sclkctl: I2SCLKCTL

0xd0 - I2S Clock Control

i2smclkdiv: I2SMCLKDIV

0xd4 - MCLK Division Ratio

i2sbclkdiv: I2SBCLKDIV

0xd8 - BCLK Division Ratio

i2swclkdiv: I2SWCLKDIV

0xdc - WCLK Division Ratio

resetsecdma: RESETSECDMA

0xf0 - RESET For SEC (PKA And TRNG And CRYPTO) And UDMA

resetgpio: RESETGPIO

0xf4 - RESET For GPIO IPs

resetgpt: RESETGPT

0xf8 - RESET For GPT Ips

reseti2c: RESETI2C

0xfc - RESET For I2C IPs

resetuart: RESETUART

0x100 - RESET For UART IPs

resetssi: RESETSSI

0x104 - RESET For SSI IPs

reseti2s: RESETI2S

0x108 - RESET For I2S IP

pdctl0: PDCTL0

0x12c - Power Domain Control

pdctl0rfc: PDCTL0RFC

0x130 - RFC Power Domain Control

pdctl0serial: PDCTL0SERIAL

0x134 - SERIAL Power Domain Control

pdctl0periph: PDCTL0PERIPH

0x138 - PERIPH Power Domain Control

pdstat0: PDSTAT0

0x140 - Power Domain Status

pdstat0rfc: PDSTAT0RFC

0x144 - RFC Power Domain Status

pdstat0serial: PDSTAT0SERIAL

0x148 - SERIAL Power Domain Status

pdstat0periph: PDSTAT0PERIPH

0x14c - PERIPH Power Domain Status

pdctl1: PDCTL1

0x17c - Power Domain Control

pdctl1cpu: PDCTL1CPU

0x184 - CPU Power Domain Direct Control

pdctl1rfc: PDCTL1RFC

0x188 - RFC Power Domain Direct Control

pdctl1vims: PDCTL1VIMS

0x18c - VIMS Mode Direct Control

pdstat1: PDSTAT1

0x194 - Power Manager Status

pdstat1bus: PDSTAT1BUS

0x198 - BUS Power Domain Direct Read Status

pdstat1rfc: PDSTAT1RFC

0x19c - RFC Power Domain Direct Read Status

pdstat1cpu: PDSTAT1CPU

0x1a0 - CPU Power Domain Direct Read Status

pdstat1vims: PDSTAT1VIMS

0x1a4 - VIMS Mode Direct Read Status

rfcbits: RFCBITS

0x1cc - Control To RFC

rfcmodesel: RFCMODESEL

0x1d0 - Selected RFC Mode

rfcmodehwopt: RFCMODEHWOPT

0x1d4 - Allowed RFC Modes

pwrprofstat: PWRPROFSTAT

0x1e0 - Power Profiler Register

mcusramcfg: MCUSRAMCFG

0x21c - MCU SRAM configuration

ramreten: RAMRETEN

0x224 - Memory Retention Control

oscimsc: OSCIMSC

0x290 - Oscillator Interrupt Mask

oscris: OSCRIS

0x294 - Oscillator Raw Interrupt Status

oscicr: OSCICR

0x298 - Oscillator Raw Interrupt Clear

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