[−][src]Struct cc13x2_cc26x2_hal::cpu_fpb::RegisterBlock

#[repr(C)]

pub struct RegisterBlock {
    pub ctrl: CTRL,
    pub remap: REMAP,
    pub comp0: COMP0,
    pub comp1: COMP1,
    pub comp2: COMP2,
    pub comp3: COMP3,
    pub comp4: COMP4,
    pub comp5: COMP5,
    pub comp6: COMP6,
    pub comp7: COMP7,
}

Register block

Fields

ctrl: CTRL

0x00 - Control This register is used to enable the flash patch block.

remap: REMAP

0x04 - Remap This register provides the remap base address location where a matched addresses are remapped. The three most significant bits and the five least significant bits of the remap base address are hard-coded to 3'b001 and 5'b00000 respectively. The remap base address must be in system space and is it required to be 8-word aligned, with one word allocated to each of the eight FPB comparators.

comp0: COMP0

0x08 - Comparator 0

comp1: COMP1

0x0c - Comparator 1

comp2: COMP2

0x10 - Comparator 2

comp3: COMP3

0x14 - Comparator 3

comp4: COMP4

0x18 - Comparator 4

comp5: COMP5

0x1c - Comparator 5

comp6: COMP6

0x20 - Comparator 6

comp7: COMP7

0x24 - Comparator 7

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