Expand description
Peripheral access API for AWR2544 microcontrollers (generated using svd2rust v0.33.4 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Modules§
- dss_
cbuff - DSS_CBUFF
- dss_
csi2_ phy - CSI2_PHY
- dss_
csi2_ protocol_ engine - CSI2 protocol engine (MIPI Display Serial Interface Protocole)
- dss_
ctrl - DSS_CTRL
- dss_
dsp_ pbist - PBIST
- dss_
ecc_ agg - DSS_ECC_AGG
- dss_esm
- MSS_ESM
- dss_
hwa_ cfg - DSS_HWA_CFG
- dss_
mcrc - MSS_MCRC
- dss_pcr
- DSS_PCR
- dss_rcm
- DSS_RCM
- dss_
tpcc_ a - TPCC
- dss_
tptc_ a0 - Register test environment
- dss_
tptc_ a1 - Register test environment
- generic
- Common register and bit access and modify traits
- mpu_
dss_ l2_ bankc - MPU
- mpu_
dss_ l3_ banka - MPU
- mpu_
dss_ l3_ bankb - MPU
- mpu_
mss_ cr5a_ axis - MPU
- mpu_
mss_ l2_ banka - MPU
- mpu_
mss_ l2_ bankb - MPU
- mpu_
mss_ mbox - MPU
- mpu_
mss_ pcra - MPU
- mpu_
mss_ qspi - MPU
- mss_
ccmr - MSS_CCMR
- mss_
cpsw - MSS_CPSW
- mss_
ctrl - MSS_CTRL
- mss_
dcca - MSS_DCC
- mss_
dccb - MSS_DCC
- mss_
dccc - MSS_DCC
- mss_
dccd - MSS_DCC
- mss_
ecc_ agg_ mss - MSS_ECC_AGG_MSS
- mss_
ecc_ agg_ r5a - MSS_ECC_AGG_R5A
- mss_esm
- MSS_ESM
- mss_
etpwma - MSS_ETPWM
- mss_
etpwmb - MSS_ETPWM
- mss_
etpwmc - MSS_ETPWM
- mss_gio
- MSS_GIO
- mss_
gpadc_ data_ ram - MSS_GPADC_DATA_RAM
- mss_
gpadc_ pkt_ ram - MSS_GPADC_PKT_RAM
- mss_i2c
- MSS_I2C
- mss_
iomux - MSS_IOMUX
- mss_
mcrc - MSS_MCRC
- mss_
pcr1 - MSS_PCR1
- mss_
pcr2 - MSS_PCR2
- mss_
qspi - MSS_QSPI
- mss_
r5ss_ stc - STC
- mss_rcm
- MSS_RCM
- mss_
rtia - MSS_RTI
- mss_
rtib - MSS_RTI
- mss_
rtic - MSS_RTI
- mss_
scia - MSS_SCI
- mss_
scib - MSS_SCI
- mss_
spib - MSS_SPI
- mss_
toprcm - MSS_TOPRCM
- mss_
tpcc_ a - TPCC
- mss_
tptc_ a0 - Register test environment
- mss_
tptc_ a1 - Register test environment
- mss_
vim_ r5a - MSS_VIM
- mss_wdt
- MSS_RTI
- rss_
ctrl - RSS_CTRL
- rss_rcm
- RSS_RCM
- rss_
tpcc_ a - TPCC
- rss_
tptc_ a0 - Register test environment
- top_
ctrl - TOP_CTRL
- top_
pbist - PBIST
Structs§
- DssCbuff
- DSS_CBUFF
- DssCsi2
Phy - CSI2_PHY
- DssCsi2
Protocol Engine - CSI2 protocol engine (MIPI Display Serial Interface Protocole)
- DssCtrl
- DSS_CTRL
- DssDsp
Pbist - PBIST
- DssEcc
Agg - DSS_ECC_AGG
- DssEsm
- MSS_ESM
- DssHwa
Cfg - DSS_HWA_CFG
- DssMcrc
- MSS_MCRC
- DssPcr
- DSS_PCR
- DssRcm
- DSS_RCM
- DssTpccA
- TPCC
- DssTptc
A0 - Register test environment
- DssTptc
A1 - Register test environment
- MpuDss
L2Bankc - MPU
- MpuDss
L3Banka - MPU
- MpuDss
L3Bankb - MPU
- MpuMss
Cr5a Axis - MPU
- MpuMss
L2Banka - MPU
- MpuMss
L2Bankb - MPU
- MpuMss
Mbox - MPU
- MpuMss
Pcra - MPU
- MpuMss
Qspi - MPU
- MssCcmr
- MSS_CCMR
- MssCpsw
- MSS_CPSW
- MssCtrl
- MSS_CTRL
- MssDcca
- MSS_DCC
- MssDccb
- MSS_DCC
- MssDccc
- MSS_DCC
- MssDccd
- MSS_DCC
- MssEcc
AggMss - MSS_ECC_AGG_MSS
- MssEcc
AggR5a - MSS_ECC_AGG_R5A
- MssEsm
- MSS_ESM
- MssEtpwma
- MSS_ETPWM
- MssEtpwmb
- MSS_ETPWM
- MssEtpwmc
- MSS_ETPWM
- MssGio
- MSS_GIO
- MssGpadc
Data Ram - MSS_GPADC_DATA_RAM
- MssGpadc
PktRam - MSS_GPADC_PKT_RAM
- MssI2c
- MSS_I2C
- MssIomux
- MSS_IOMUX
- MssMcrc
- MSS_MCRC
- MssPcr1
- MSS_PCR1
- MssPcr2
- MSS_PCR2
- MssQspi
- MSS_QSPI
- MssR5ss
Stc - STC
- MssRcm
- MSS_RCM
- MssRtia
- MSS_RTI
- MssRtib
- MSS_RTI
- MssRtic
- MSS_RTI
- MssScia
- MSS_SCI
- MssScib
- MSS_SCI
- MssSpib
- MSS_SPI
- MssToprcm
- MSS_TOPRCM
- MssTpccA
- TPCC
- MssTptc
A0 - Register test environment
- MssTptc
A1 - Register test environment
- MssVim
R5a - MSS_VIM
- MssWdt
- MSS_RTI
- Peripherals
- All the peripherals.
- RssCtrl
- RSS_CTRL
- RssRcm
- RSS_RCM
- RssTpccA
- TPCC
- RssTptc
A0 - Register test environment
- TopCtrl
- TOP_CTRL
- TopPbist
- PBIST
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority