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//! The AVR ATmega64HVE2 microcontroller
//!
//! # Variants
//! |        | Pinout | Package | Operating temperature | Operating voltage | Max speed |
//! |--------|--------|---------|-----------------------|-------------------|-----------|
//! | standard |  |  | 0°C - 0°C | 3V - 3.6V | 0 MHz |
//!
//! # Registers by module (not exhaustive)
//!
//! ## PORT modules
//!
//! * PORTB
//! * PORTA
//!
//! ## EEPROM modules
//!
//! * EEPROM
//!
//! ## ADC modules
//!
//! * ADC

pub const LOW: *mut u8 = 0x0 as *mut u8;
pub const LOCKBIT: *mut u8 = 0x0 as *mut u8;
pub const HIGH: *mut u8 = 0x1 as *mut u8;
/// Port A Input Pins.
pub const PINA: *mut u8 = 0x20 as *mut u8;
/// Port A Data Direction Register.
pub const DDRA: *mut u8 = 0x21 as *mut u8;
/// Port A Data Register.
pub const PORTA: *mut u8 = 0x22 as *mut u8;
/// Port B Input Pins.
pub const PINB: *mut u8 = 0x23 as *mut u8;
/// Port B Data Direction Register.
pub const DDRB: *mut u8 = 0x24 as *mut u8;
/// Port B Data Register.
pub const PORTB: *mut u8 = 0x25 as *mut u8;
/// Timer/Counter Interrupt Flag register.
pub const TIFR0: *mut u8 = 0x35 as *mut u8;
/// Timer/Counter Interrupt Flag register.
pub const TIFR1: *mut u8 = 0x36 as *mut u8;
/// Pin Change Interrupt Flag Register.
pub const PCIFR: *mut u8 = 0x3B as *mut u8;
/// External Interrupt Flag Register.
pub const EIFR: *mut u8 = 0x3C as *mut u8;
/// External Interrupt Mask Register.
pub const EIMSK: *mut u8 = 0x3D as *mut u8;
/// General Purpose IO Register 0.
pub const GPIOR0: *mut u8 = 0x3E as *mut u8;
/// EEPROM Control Register.
pub const EECR: *mut u8 = 0x3F as *mut u8;
/// EEPROM Data Register.
pub const EEDR: *mut u8 = 0x40 as *mut u8;
/// EEPROM Read/Write Access.
pub const EEAR: *mut u16 = 0x41 as *mut u16;
/// EEPROM Read/Write Access low byte.
pub const EEARL: *mut u8 = 0x41 as *mut u8;
/// EEPROM Read/Write Access high byte.
pub const EEARH: *mut u8 = 0x42 as *mut u8;
/// General Timer/Counter Control Register.
pub const GTCCR: *mut u8 = 0x43 as *mut u8;
/// Timer/Counter 0 Control Register A.
pub const TCCR0A: *mut u8 = 0x44 as *mut u8;
/// Timer/Counter0 Control Register B.
pub const TCCR0B: *mut u8 = 0x45 as *mut u8;
/// Timer Counter 0  Bytes.
pub const TCNT0: *mut u16 = 0x46 as *mut u16;
/// Timer Counter 0  Bytes low byte.
pub const TCNT0L: *mut u8 = 0x46 as *mut u8;
/// Timer Counter 0  Bytes high byte.
pub const TCNT0H: *mut u8 = 0x47 as *mut u8;
/// Output Compare Register 0A.
pub const OCR0A: *mut u8 = 0x48 as *mut u8;
/// Output Compare Register B.
pub const OCR0B: *mut u8 = 0x49 as *mut u8;
/// General Purpose IO Register 1.
pub const GPIOR1: *mut u8 = 0x4A as *mut u8;
/// General Purpose IO Register 2.
pub const GPIOR2: *mut u8 = 0x4B as *mut u8;
/// SPI Control Register.
pub const SPCR: *mut u8 = 0x4C as *mut u8;
/// SPI Status Register.
pub const SPSR: *mut u8 = 0x4D as *mut u8;
/// SPI Data Register.
pub const SPDR: *mut u8 = 0x4E as *mut u8;
/// Sleep Mode Control Register.
pub const SMCR: *mut u8 = 0x53 as *mut u8;
/// MCU Status Register.
pub const MCUSR: *mut u8 = 0x54 as *mut u8;
/// MCU Control Register.
pub const MCUCR: *mut u8 = 0x55 as *mut u8;
/// Store Program Memory Control and Status Register.
pub const SPMCSR: *mut u8 = 0x57 as *mut u8;
/// Stack Pointer  low byte.
pub const SPL: *mut u8 = 0x5D as *mut u8;
/// Stack Pointer.
pub const SP: *mut u16 = 0x5D as *mut u16;
/// Stack Pointer  high byte.
pub const SPH: *mut u8 = 0x5E as *mut u8;
/// Status Register.
pub const SREG: *mut u8 = 0x5F as *mut u8;
/// Watchdog Timer Control Register.
pub const WDTCSR: *mut u8 = 0x60 as *mut u8;
/// Clock Prescale Register.
pub const CLKPR: *mut u8 = 0x61 as *mut u8;
/// Wake-up Timer Control and Status Register.
pub const WUTCSR: *mut u8 = 0x62 as *mut u8;
/// Watchdog Timer Configuration Lock Register.
pub const WDTCLR: *mut u8 = 0x63 as *mut u8;
/// Power Reduction Register 0.
pub const PRR0: *mut u8 = 0x64 as *mut u8;
/// Slow Oscillator Calibration Register A.
pub const SOSCCALA: *mut u8 = 0x66 as *mut u8;
/// Oscillator Calibration Register B.
pub const SOSCCALB: *mut u8 = 0x67 as *mut u8;
/// Pin Change Interrupt Control Register.
pub const PCICR: *mut u8 = 0x68 as *mut u8;
/// External Interrupt Control Register.
pub const EICRA: *mut u8 = 0x69 as *mut u8;
/// Pin Change Enable Mask Register 0.
pub const PCMSK0: *mut u8 = 0x6B as *mut u8;
/// Pin Change Enable Mask Register 1.
pub const PCMSK1: *mut u8 = 0x6C as *mut u8;
/// Timer/Counter Interrupt Mask Register.
pub const TIMSK0: *mut u8 = 0x6E as *mut u8;
/// Timer/Counter Interrupt Mask Register.
pub const TIMSK1: *mut u8 = 0x6F as *mut u8;
/// Digital Input Disable Register.
pub const DIDR0: *mut u8 = 0x7E as *mut u8;
/// Timer/Counter 1 Control Register A.
pub const TCCR1A: *mut u8 = 0x80 as *mut u8;
/// Timer/Counter1 Control Register B.
pub const TCCR1B: *mut u8 = 0x81 as *mut u8;
/// Timer Counter 1  Bytes.
pub const TCNT1: *mut u16 = 0x84 as *mut u16;
/// Timer Counter 1  Bytes low byte.
pub const TCNT1L: *mut u8 = 0x84 as *mut u8;
/// Timer Counter 1  Bytes high byte.
pub const TCNT1H: *mut u8 = 0x85 as *mut u8;
/// Output Compare Register 1A.
pub const OCR1A: *mut u8 = 0x88 as *mut u8;
/// Output Compare Register B.
pub const OCR1B: *mut u8 = 0x89 as *mut u8;
/// LIN Control Register.
pub const LINCR: *mut u8 = 0xC0 as *mut u8;
/// LIN Status and Interrupt Register.
pub const LINSIR: *mut u8 = 0xC1 as *mut u8;
/// LIN Enable Interrupt Register.
pub const LINENIR: *mut u8 = 0xC2 as *mut u8;
/// LIN Error Register.
pub const LINERR: *mut u8 = 0xC3 as *mut u8;
/// LIN Bit Timing Register.
pub const LINBTR: *mut u8 = 0xC4 as *mut u8;
/// LIN Baud Rate Low Register.
pub const LINBRRL: *mut u8 = 0xC5 as *mut u8;
/// LIN Baud Rate High Register.
pub const LINBRRH: *mut u8 = 0xC6 as *mut u8;
/// LIN Data Length Register.
pub const LINDLR: *mut u8 = 0xC7 as *mut u8;
/// LIN Identifier Register.
pub const LINIDR: *mut u8 = 0xC8 as *mut u8;
/// LIN Data Buffer Selection Register.
pub const LINSEL: *mut u8 = 0xC9 as *mut u8;
/// LIN Data Register.
pub const LINDAT: *mut u8 = 0xCA as *mut u8;
/// Bandgap Control and Status Register A.
pub const BGCSRA: *mut u8 = 0xD1 as *mut u8;
/// Band Gap Calibration Register B.
pub const BGCRB: *mut u8 = 0xD2 as *mut u8;
/// Band Gap Calibration Register A.
pub const BGCRA: *mut u8 = 0xD3 as *mut u8;
/// Band Gap Lock Register.
pub const BGLR: *mut u8 = 0xD4 as *mut u8;
/// PLL Control and Status Register.
pub const PLLCSR: *mut u8 = 0xD8 as *mut u8;
/// Port B Override.
pub const PBOV: *mut u8 = 0xDC as *mut u8;
/// ADC Synchronization Control and Status Register.
pub const ADSCSRA: *mut u8 = 0xE0 as *mut u8;
/// ADC Synchronization Control and Status Register.
pub const ADSCSRB: *mut u8 = 0xE1 as *mut u8;
/// ADC Control Register A.
pub const ADCRA: *mut u8 = 0xE2 as *mut u8;
/// ADC Control Register B.
pub const ADCRB: *mut u8 = 0xE3 as *mut u8;
/// ADC Control Register B.
pub const ADCRC: *mut u8 = 0xE4 as *mut u8;
/// ADC Control Register D.
pub const ADCRD: *mut u8 = 0xE5 as *mut u8;
/// ADC Control Register E.
pub const ADCRE: *mut u8 = 0xE6 as *mut u8;
/// ADC Interrupt Flag Register.
pub const ADIFR: *mut u8 = 0xE7 as *mut u8;
/// ADC Interrupt Mask Register.
pub const ADIMR: *mut u8 = 0xE8 as *mut u8;
/// CC-ADC Regulator Current Comparator Threshold Level low byte.
pub const CADRCLL: *mut u8 = 0xE9 as *mut u8;
/// CC-ADC Regulator Current Comparator Threshold Level.
pub const CADRCL: *mut u16 = 0xE9 as *mut u16;
/// CC-ADC Regulator Current Comparator Threshold Level high byte.
pub const CADRCLH: *mut u8 = 0xEA as *mut u8;
/// C-ADC Instantaneous Conversion Result.
pub const CADIC: *mut u16 = 0xEB as *mut u16;
/// C-ADC Instantaneous Conversion Result low byte.
pub const CADICL: *mut u8 = 0xEB as *mut u8;
/// C-ADC Instantaneous Conversion Result high byte.
pub const CADICH: *mut u8 = 0xEC as *mut u8;
/// C-ADC Accumulated Conversion Result.
pub const CADAC0: *mut u8 = 0xED as *mut u8;
/// C-ADC Accumulated Conversion Result.
pub const CADAC1: *mut u8 = 0xEE as *mut u8;
/// C-ADC Accumulated Conversion Result.
pub const CADAC2: *mut u8 = 0xEF as *mut u8;
/// C-ADC Accumulated Conversion Result.
pub const CADAC3: *mut u8 = 0xF0 as *mut u8;
/// V-ADC Instantaneous Conversion Result low byte.
pub const VADICL: *mut u8 = 0xF1 as *mut u8;
/// V-ADC Instantaneous Conversion Result.
pub const VADIC: *mut u16 = 0xF1 as *mut u16;
/// V-ADC Instantaneous Conversion Result high byte.
pub const VADICH: *mut u8 = 0xF2 as *mut u8;
/// V-ADC Accumulated Conversion Result.
pub const VADAC0: *mut u8 = 0xF3 as *mut u8;
/// V-ADC Accumulated Conversion Result.
pub const VADAC1: *mut u8 = 0xF4 as *mut u8;
/// V-ADC Accumulated Conversion Result.
pub const VADAC2: *mut u8 = 0xF5 as *mut u8;
/// V-ADC Accumulated Conversion Result.
pub const VADAC3: *mut u8 = 0xF6 as *mut u8;