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//! The AVR ATmega16HVA microcontroller
//!
//! # Variants
//! |        | Pinout | Package | Operating temperature | Operating voltage | Max speed |
//! |--------|--------|---------|-----------------------|-------------------|-----------|
//! | standard |  |  | 0°C - 0°C | 1.8V - 4.5V | 0 MHz |
//!
//! # Registers by module (not exhaustive)
//!
//! ## PORT modules
//!
//! * PORTC
//! * PORTA
//! * PORTB
//!
//! ## ADC modules
//!
//! * ADC
//!
//! ## EEPROM modules
//!
//! * EEPROM

pub const LOCKBIT: *mut u8 = 0x0 as *mut u8;
pub const LOW: *mut u8 = 0x0 as *mut u8;
/// Port A Input Pins.
pub const PINA: *mut u8 = 0x20 as *mut u8;
/// Port A Data Direction Register.
pub const DDRA: *mut u8 = 0x21 as *mut u8;
/// Port A Data Register.
pub const PORTA: *mut u8 = 0x22 as *mut u8;
/// Input Pins, Port B.
pub const PINB: *mut u8 = 0x23 as *mut u8;
/// Data Direction Register, Port B.
pub const DDRB: *mut u8 = 0x24 as *mut u8;
/// Data Register, Port B.
pub const PORTB: *mut u8 = 0x25 as *mut u8;
/// Port C Input Pins.
pub const PINC: *mut u8 = 0x26 as *mut u8;
/// Port C Data Register.
pub const PORTC: *mut u8 = 0x28 as *mut u8;
/// Timer/Counter Interrupt Flag register.
pub const TIFR0: *mut u8 = 0x35 as *mut u8;
/// Timer/Counter Interrupt Flag register.
pub const TIFR1: *mut u8 = 0x36 as *mut u8;
/// Oscillator Sampling Interface Control and Status Register.
pub const OSICSR: *mut u8 = 0x37 as *mut u8;
/// External Interrupt Flag Register.
pub const EIFR: *mut u8 = 0x3C as *mut u8;
/// External Interrupt Mask Register.
pub const EIMSK: *mut u8 = 0x3D as *mut u8;
/// General Purpose IO Register 0.
pub const GPIOR0: *mut u8 = 0x3E as *mut u8;
/// EEPROM Control Register.
pub const EECR: *mut u8 = 0x3F as *mut u8;
/// EEPROM Data Register.
pub const EEDR: *mut u8 = 0x40 as *mut u8;
/// EEPROM Read/Write Access.
pub const EEAR: *mut u8 = 0x41 as *mut u8;
/// General Timer/Counter Control Register.
pub const GTCCR: *mut u8 = 0x43 as *mut u8;
/// Timer/Counter0 Control Register.
pub const TCCR0A: *mut u8 = 0x44 as *mut u8;
/// Timer/Counter0 Control Register.
pub const TCCR0B: *mut u8 = 0x45 as *mut u8;
/// Timer Counter 0  Bytes.
pub const TCNT0: *mut u16 = 0x46 as *mut u16;
/// Timer Counter 0  Bytes low byte.
pub const TCNT0L: *mut u8 = 0x46 as *mut u8;
/// Timer Counter 0  Bytes high byte.
pub const TCNT0H: *mut u8 = 0x47 as *mut u8;
/// Output compare Register A.
pub const OCR0A: *mut u8 = 0x48 as *mut u8;
/// Output compare Register B.
pub const OCR0B: *mut u8 = 0x49 as *mut u8;
/// General Purpose IO Register 1.
pub const GPIOR1: *mut u8 = 0x4A as *mut u8;
/// General Purpose IO Register 2.
pub const GPIOR2: *mut u8 = 0x4B as *mut u8;
/// SPI Control Register.
pub const SPCR: *mut u8 = 0x4C as *mut u8;
/// SPI Status Register.
pub const SPSR: *mut u8 = 0x4D as *mut u8;
/// SPI Data Register.
pub const SPDR: *mut u8 = 0x4E as *mut u8;
/// Sleep Mode Control Register.
pub const SMCR: *mut u8 = 0x53 as *mut u8;
/// MCU Status Register.
pub const MCUSR: *mut u8 = 0x54 as *mut u8;
/// MCU Control Register.
pub const MCUCR: *mut u8 = 0x55 as *mut u8;
/// Store Program Memory Control and Status Register.
pub const SPMCSR: *mut u8 = 0x57 as *mut u8;
/// Stack Pointer  low byte.
pub const SPL: *mut u8 = 0x5D as *mut u8;
/// Stack Pointer.
pub const SP: *mut u16 = 0x5D as *mut u16;
/// Stack Pointer  high byte.
pub const SPH: *mut u8 = 0x5E as *mut u8;
/// Status Register.
pub const SREG: *mut u8 = 0x5F as *mut u8;
/// Watchdog Timer Control Register.
pub const WDTCSR: *mut u8 = 0x60 as *mut u8;
/// Clock Prescale Register.
pub const CLKPR: *mut u8 = 0x61 as *mut u8;
/// Power Reduction Register 0.
pub const PRR0: *mut u8 = 0x64 as *mut u8;
/// Fast Oscillator Calibration Value.
pub const FOSCCAL: *mut u8 = 0x66 as *mut u8;
/// External Interrupt Control Register.
pub const EICRA: *mut u8 = 0x69 as *mut u8;
/// Timer/Counter Interrupt Mask Register.
pub const TIMSK0: *mut u8 = 0x6E as *mut u8;
/// Timer/Counter Interrupt Mask Register.
pub const TIMSK1: *mut u8 = 0x6F as *mut u8;
/// VADC Data Register  Bytes.
pub const VADC: *mut u16 = 0x78 as *mut u16;
/// VADC Data Register  Bytes low byte.
pub const VADCL: *mut u8 = 0x78 as *mut u8;
/// VADC Data Register  Bytes high byte.
pub const VADCH: *mut u8 = 0x79 as *mut u8;
/// The VADC Control and Status register.
pub const VADCSR: *mut u8 = 0x7A as *mut u8;
/// The VADC multiplexer Selection Register.
pub const VADMUX: *mut u8 = 0x7C as *mut u8;
/// Digital Input Disable Register.
pub const DIDR0: *mut u8 = 0x7E as *mut u8;
/// Timer/Counter 1 Control Register A.
pub const TCCR1A: *mut u8 = 0x80 as *mut u8;
/// Timer/Counter1 Control Register B.
pub const TCCR1B: *mut u8 = 0x81 as *mut u8;
/// Timer Counter 1  Bytes low byte.
pub const TCNT1L: *mut u8 = 0x84 as *mut u8;
/// Timer Counter 1  Bytes.
pub const TCNT1: *mut u16 = 0x84 as *mut u16;
/// Timer Counter 1  Bytes high byte.
pub const TCNT1H: *mut u8 = 0x85 as *mut u8;
/// Output Compare Register 1A.
pub const OCR1A: *mut u8 = 0x88 as *mut u8;
/// Output Compare Register B.
pub const OCR1B: *mut u8 = 0x89 as *mut u8;
/// Regulator Operating Condition Register.
pub const ROCR: *mut u8 = 0xC8 as *mut u8;
/// Bandgap Calibration Register.
pub const BGCCR: *mut u8 = 0xD0 as *mut u8;
/// Bandgap Calibration of Resistor Ladder.
pub const BGCRR: *mut u8 = 0xD1 as *mut u8;
/// ADC Accumulate Current.
pub const CADAC0: *mut u8 = 0xE0 as *mut u8;
/// ADC Accumulate Current.
pub const CADAC1: *mut u8 = 0xE1 as *mut u8;
/// ADC Accumulate Current.
pub const CADAC2: *mut u8 = 0xE2 as *mut u8;
/// ADC Accumulate Current.
pub const CADAC3: *mut u8 = 0xE3 as *mut u8;
/// CC-ADC Control and Status Register A.
pub const CADCSRA: *mut u8 = 0xE4 as *mut u8;
/// CC-ADC Control and Status Register B.
pub const CADCSRB: *mut u8 = 0xE5 as *mut u8;
/// CC-ADC Regular Current.
pub const CADRC: *mut u8 = 0xE6 as *mut u8;
/// CC-ADC Instantaneous Current low byte.
pub const CADICL: *mut u8 = 0xE8 as *mut u8;
/// CC-ADC Instantaneous Current.
pub const CADIC: *mut u16 = 0xE8 as *mut u16;
/// CC-ADC Instantaneous Current high byte.
pub const CADICH: *mut u8 = 0xE9 as *mut u8;
/// FET Control and Status Register.
pub const FCSR: *mut u8 = 0xF0 as *mut u8;
/// Battery Protection Interrupt Mask Register.
pub const BPIMSK: *mut u8 = 0xF2 as *mut u8;
/// Battery Protection Interrupt Flag Register.
pub const BPIFR: *mut u8 = 0xF3 as *mut u8;
/// Battery Protection Short-Circuit Detection Level Register.
pub const BPSCD: *mut u8 = 0xF5 as *mut u8;
/// Battery Protection Discharge-Over-current Detection Level Register.
pub const BPDOCD: *mut u8 = 0xF6 as *mut u8;
/// Battery Protection Charge-Over-current Detection Level Register.
pub const BPCOCD: *mut u8 = 0xF7 as *mut u8;
/// Battery Protection Discharge-High-current Detection Level Register.
pub const BPDHCD: *mut u8 = 0xF8 as *mut u8;
/// Battery Protection Charge-High-current Detection Level Register.
pub const BPCHCD: *mut u8 = 0xF9 as *mut u8;
/// Battery Protection Short-current Timing Register.
pub const BPSCTR: *mut u8 = 0xFA as *mut u8;
/// Battery Protection Over-current Timing Register.
pub const BPOCTR: *mut u8 = 0xFB as *mut u8;
/// Battery Protection Short-current Timing Register.
pub const BPHCTR: *mut u8 = 0xFC as *mut u8;
/// Battery Protection Control Register.
pub const BPCR: *mut u8 = 0xFD as *mut u8;
/// Battery Protection Parameter Lock Register.
pub const BPPLR: *mut u8 = 0xFE as *mut u8;