#[doc = "Register `UART_IDR` writer"]
pub struct W(crate::W<UART_IDR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<UART_IDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<UART_IDR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<UART_IDR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RXRDY` writer - Disable RXRDY Interrupt"]
pub struct RXRDY_W<'a> {
w: &'a mut W,
}
impl<'a> RXRDY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "Field `TXRDY` writer - Disable TXRDY Interrupt"]
pub struct TXRDY_W<'a> {
w: &'a mut W,
}
impl<'a> TXRDY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `OVRE` writer - Disable Overrun Error Interrupt"]
pub struct OVRE_W<'a> {
w: &'a mut W,
}
impl<'a> OVRE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "Field `FRAME` writer - Disable Framing Error Interrupt"]
pub struct FRAME_W<'a> {
w: &'a mut W,
}
impl<'a> FRAME_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "Field `PARE` writer - Disable Parity Error Interrupt"]
pub struct PARE_W<'a> {
w: &'a mut W,
}
impl<'a> PARE_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "Field `TXEMPTY` writer - Disable TXEMPTY Interrupt"]
pub struct TXEMPTY_W<'a> {
w: &'a mut W,
}
impl<'a> TXEMPTY_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `CMP` writer - Disable Comparison Interrupt"]
pub struct CMP_W<'a> {
w: &'a mut W,
}
impl<'a> CMP_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15);
self.w
}
}
impl W {
#[doc = "Bit 0 - Disable RXRDY Interrupt"]
#[inline(always)]
pub fn rxrdy(&mut self) -> RXRDY_W {
RXRDY_W { w: self }
}
#[doc = "Bit 1 - Disable TXRDY Interrupt"]
#[inline(always)]
pub fn txrdy(&mut self) -> TXRDY_W {
TXRDY_W { w: self }
}
#[doc = "Bit 5 - Disable Overrun Error Interrupt"]
#[inline(always)]
pub fn ovre(&mut self) -> OVRE_W {
OVRE_W { w: self }
}
#[doc = "Bit 6 - Disable Framing Error Interrupt"]
#[inline(always)]
pub fn frame(&mut self) -> FRAME_W {
FRAME_W { w: self }
}
#[doc = "Bit 7 - Disable Parity Error Interrupt"]
#[inline(always)]
pub fn pare(&mut self) -> PARE_W {
PARE_W { w: self }
}
#[doc = "Bit 9 - Disable TXEMPTY Interrupt"]
#[inline(always)]
pub fn txempty(&mut self) -> TXEMPTY_W {
TXEMPTY_W { w: self }
}
#[doc = "Bit 15 - Disable Comparison Interrupt"]
#[inline(always)]
pub fn cmp(&mut self) -> CMP_W {
CMP_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt Disable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_idr](index.html) module"]
pub struct UART_IDR_SPEC;
impl crate::RegisterSpec for UART_IDR_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [uart_idr::W](W) writer structure"]
impl crate::Writable for UART_IDR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets UART_IDR to value 0"]
impl crate::Resettable for UART_IDR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}