Struct atsams70q20::pwm0::PWM_CH_NUM

source · [−]
#[repr(C)]
pub struct PWM_CH_NUM {
    pub pwm_cmr: Reg<PWM_CMR_SPEC>,
    pub pwm_cdty: Reg<PWM_CDTY_SPEC>,
    pub pwm_cdtyupd: Reg<PWM_CDTYUPD_SPEC>,
    pub pwm_cprd: Reg<PWM_CPRD_SPEC>,
    pub pwm_cprdupd: Reg<PWM_CPRDUPD_SPEC>,
    pub pwm_ccnt: Reg<PWM_CCNT_SPEC>,
    pub pwm_dt: Reg<PWM_DT_SPEC>,
    pub pwm_dtupd: Reg<PWM_DTUPD_SPEC>,
}
Expand description

Register block

Fields

pwm_cmr: Reg<PWM_CMR_SPEC>

0x00 - PWM Channel Mode Register (ch_num = 0)

pwm_cdty: Reg<PWM_CDTY_SPEC>

0x04 - PWM Channel Duty Cycle Register (ch_num = 0)

pwm_cdtyupd: Reg<PWM_CDTYUPD_SPEC>

0x08 - PWM Channel Duty Cycle Update Register (ch_num = 0)

pwm_cprd: Reg<PWM_CPRD_SPEC>

0x0c - PWM Channel Period Register (ch_num = 0)

pwm_cprdupd: Reg<PWM_CPRDUPD_SPEC>

0x10 - PWM Channel Period Update Register (ch_num = 0)

pwm_ccnt: Reg<PWM_CCNT_SPEC>

0x14 - PWM Channel Counter Register (ch_num = 0)

pwm_dt: Reg<PWM_DT_SPEC>

0x18 - PWM Channel Dead Time Register (ch_num = 0)

pwm_dtupd: Reg<PWM_DTUPD_SPEC>

0x1c - PWM Channel Dead Time Update Register (ch_num = 0)

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