Struct atsams70q19::rtc::RegisterBlock

source · [−]
#[repr(C)]
pub struct RegisterBlock {
    pub rtc_cr: Reg<RTC_CR_SPEC>,
    pub rtc_mr: Reg<RTC_MR_SPEC>,
    pub rtc_timr: Reg<RTC_TIMR_SPEC>,
    pub rtc_calr: Reg<RTC_CALR_SPEC>,
    pub rtc_timalr: Reg<RTC_TIMALR_SPEC>,
    pub rtc_calalr: Reg<RTC_CALALR_SPEC>,
    pub rtc_sr: Reg<RTC_SR_SPEC>,
    pub rtc_sccr: Reg<RTC_SCCR_SPEC>,
    pub rtc_ier: Reg<RTC_IER_SPEC>,
    pub rtc_idr: Reg<RTC_IDR_SPEC>,
    pub rtc_imr: Reg<RTC_IMR_SPEC>,
    pub rtc_ver: Reg<RTC_VER_SPEC>,
}
Expand description

Register block

Fields

rtc_cr: Reg<RTC_CR_SPEC>

0x00 - Control Register

rtc_mr: Reg<RTC_MR_SPEC>

0x04 - Mode Register

rtc_timr: Reg<RTC_TIMR_SPEC>

0x08 - Time Register

rtc_calr: Reg<RTC_CALR_SPEC>

0x0c - Calendar Register

rtc_timalr: Reg<RTC_TIMALR_SPEC>

0x10 - Time Alarm Register

rtc_calalr: Reg<RTC_CALALR_SPEC>

0x14 - Calendar Alarm Register

rtc_sr: Reg<RTC_SR_SPEC>

0x18 - Status Register

rtc_sccr: Reg<RTC_SCCR_SPEC>

0x1c - Status Clear Command Register

rtc_ier: Reg<RTC_IER_SPEC>

0x20 - Interrupt Enable Register

rtc_idr: Reg<RTC_IDR_SPEC>

0x24 - Interrupt Disable Register

rtc_imr: Reg<RTC_IMR_SPEC>

0x28 - Interrupt Mask Register

rtc_ver: Reg<RTC_VER_SPEC>

0x2c - Valid Entry Register

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