1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307
#[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - System Clock Enable Register"] pub pmc_scer: PMC_SCER, #[doc = "0x04 - System Clock Disable Register"] pub pmc_scdr: PMC_SCDR, #[doc = "0x08 - System Clock Status Register"] pub pmc_scsr: PMC_SCSR, _reserved3: [u8; 4usize], #[doc = "0x10 - Peripheral Clock Enable Register 0"] pub pmc_pcer0: PMC_PCER0, #[doc = "0x14 - Peripheral Clock Disable Register 0"] pub pmc_pcdr0: PMC_PCDR0, #[doc = "0x18 - Peripheral Clock Status Register 0"] pub pmc_pcsr0: PMC_PCSR0, #[doc = "0x1c - UTMI Clock Register"] pub ckgr_uckr: CKGR_UCKR, #[doc = "0x20 - Main Oscillator Register"] pub ckgr_mor: CKGR_MOR, #[doc = "0x24 - Main Clock Frequency Register"] pub ckgr_mcfr: CKGR_MCFR, #[doc = "0x28 - PLLA Register"] pub ckgr_pllar: CKGR_PLLAR, _reserved10: [u8; 4usize], #[doc = "0x30 - Master Clock Register"] pub pmc_mckr: PMC_MCKR, _reserved11: [u8; 4usize], #[doc = "0x38 - USB Clock Register"] pub pmc_usb: PMC_USB, _reserved12: [u8; 4usize], #[doc = "0x40 - Programmable Clock Register"] pub pmc_pck: [PMC_PCK; 8], #[doc = "0x60 - Interrupt Enable Register"] pub pmc_ier: PMC_IER, #[doc = "0x64 - Interrupt Disable Register"] pub pmc_idr: PMC_IDR, #[doc = "0x68 - Status Register"] pub pmc_sr: PMC_SR, #[doc = "0x6c - Interrupt Mask Register"] pub pmc_imr: PMC_IMR, #[doc = "0x70 - Fast Startup Mode Register"] pub pmc_fsmr: PMC_FSMR, #[doc = "0x74 - Fast Startup Polarity Register"] pub pmc_fspr: PMC_FSPR, #[doc = "0x78 - Fault Output Clear Register"] pub pmc_focr: PMC_FOCR, _reserved20: [u8; 104usize], #[doc = "0xe4 - Write Protection Mode Register"] pub pmc_wpmr: PMC_WPMR, #[doc = "0xe8 - Write Protection Status Register"] pub pmc_wpsr: PMC_WPSR, _reserved22: [u8; 20usize], #[doc = "0x100 - Peripheral Clock Enable Register 1"] pub pmc_pcer1: PMC_PCER1, #[doc = "0x104 - Peripheral Clock Disable Register 1"] pub pmc_pcdr1: PMC_PCDR1, #[doc = "0x108 - Peripheral Clock Status Register 1"] pub pmc_pcsr1: PMC_PCSR1, #[doc = "0x10c - Peripheral Control Register"] pub pmc_pcr: PMC_PCR, #[doc = "0x110 - Oscillator Calibration Register"] pub pmc_ocr: PMC_OCR, #[doc = "0x114 - SleepWalking Enable Register 0"] pub pmc_slpwk_er0: PMC_SLPWK_ER0, #[doc = "0x118 - SleepWalking Disable Register 0"] pub pmc_slpwk_dr0: PMC_SLPWK_DR0, #[doc = "0x11c - SleepWalking Status Register 0"] pub pmc_slpwk_sr0: PMC_SLPWK_SR0, #[doc = "0x120 - SleepWalking Activity Status Register 0"] pub pmc_slpwk_asr0: PMC_SLPWK_ASR0, _reserved31: [u8; 12usize], #[doc = "0x130 - PLL Maximum Multiplier Value Register"] pub pmc_pmmr: PMC_PMMR, #[doc = "0x134 - SleepWalking Enable Register 1"] pub pmc_slpwk_er1: PMC_SLPWK_ER1, #[doc = "0x138 - SleepWalking Disable Register 1"] pub pmc_slpwk_dr1: PMC_SLPWK_DR1, #[doc = "0x13c - SleepWalking Status Register 1"] pub pmc_slpwk_sr1: PMC_SLPWK_SR1, #[doc = "0x140 - SleepWalking Activity Status Register 1"] pub pmc_slpwk_asr1: PMC_SLPWK_ASR1, #[doc = "0x144 - SleepWalking Activity In Progress Register"] pub pmc_slpwk_aipr: PMC_SLPWK_AIPR, } #[doc = "System Clock Enable Register"] pub struct PMC_SCER { register: vcell::VolatileCell<u32>, } #[doc = "System Clock Enable Register"] pub mod pmc_scer; #[doc = "System Clock Disable Register"] pub struct PMC_SCDR { register: vcell::VolatileCell<u32>, } #[doc = "System Clock Disable Register"] pub mod pmc_scdr; #[doc = "System Clock Status Register"] pub struct PMC_SCSR { register: vcell::VolatileCell<u32>, } #[doc = "System Clock Status Register"] pub mod pmc_scsr; #[doc = "Peripheral Clock Enable Register 0"] pub struct PMC_PCER0 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Enable Register 0"] pub mod pmc_pcer0; #[doc = "Peripheral Clock Disable Register 0"] pub struct PMC_PCDR0 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Disable Register 0"] pub mod pmc_pcdr0; #[doc = "Peripheral Clock Status Register 0"] pub struct PMC_PCSR0 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Status Register 0"] pub mod pmc_pcsr0; #[doc = "UTMI Clock Register"] pub struct CKGR_UCKR { register: vcell::VolatileCell<u32>, } #[doc = "UTMI Clock Register"] pub mod ckgr_uckr; #[doc = "Main Oscillator Register"] pub struct CKGR_MOR { register: vcell::VolatileCell<u32>, } #[doc = "Main Oscillator Register"] pub mod ckgr_mor; #[doc = "Main Clock Frequency Register"] pub struct CKGR_MCFR { register: vcell::VolatileCell<u32>, } #[doc = "Main Clock Frequency Register"] pub mod ckgr_mcfr; #[doc = "PLLA Register"] pub struct CKGR_PLLAR { register: vcell::VolatileCell<u32>, } #[doc = "PLLA Register"] pub mod ckgr_pllar; #[doc = "Master Clock Register"] pub struct PMC_MCKR { register: vcell::VolatileCell<u32>, } #[doc = "Master Clock Register"] pub mod pmc_mckr; #[doc = "USB Clock Register"] pub struct PMC_USB { register: vcell::VolatileCell<u32>, } #[doc = "USB Clock Register"] pub mod pmc_usb; #[doc = "Programmable Clock Register"] pub struct PMC_PCK { register: vcell::VolatileCell<u32>, } #[doc = "Programmable Clock Register"] pub mod pmc_pck; #[doc = "Interrupt Enable Register"] pub struct PMC_IER { register: vcell::VolatileCell<u32>, } #[doc = "Interrupt Enable Register"] pub mod pmc_ier; #[doc = "Interrupt Disable Register"] pub struct PMC_IDR { register: vcell::VolatileCell<u32>, } #[doc = "Interrupt Disable Register"] pub mod pmc_idr; #[doc = "Status Register"] pub struct PMC_SR { register: vcell::VolatileCell<u32>, } #[doc = "Status Register"] pub mod pmc_sr; #[doc = "Interrupt Mask Register"] pub struct PMC_IMR { register: vcell::VolatileCell<u32>, } #[doc = "Interrupt Mask Register"] pub mod pmc_imr; #[doc = "Fast Startup Mode Register"] pub struct PMC_FSMR { register: vcell::VolatileCell<u32>, } #[doc = "Fast Startup Mode Register"] pub mod pmc_fsmr; #[doc = "Fast Startup Polarity Register"] pub struct PMC_FSPR { register: vcell::VolatileCell<u32>, } #[doc = "Fast Startup Polarity Register"] pub mod pmc_fspr; #[doc = "Fault Output Clear Register"] pub struct PMC_FOCR { register: vcell::VolatileCell<u32>, } #[doc = "Fault Output Clear Register"] pub mod pmc_focr; #[doc = "Write Protection Mode Register"] pub struct PMC_WPMR { register: vcell::VolatileCell<u32>, } #[doc = "Write Protection Mode Register"] pub mod pmc_wpmr; #[doc = "Write Protection Status Register"] pub struct PMC_WPSR { register: vcell::VolatileCell<u32>, } #[doc = "Write Protection Status Register"] pub mod pmc_wpsr; #[doc = "Peripheral Clock Enable Register 1"] pub struct PMC_PCER1 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Enable Register 1"] pub mod pmc_pcer1; #[doc = "Peripheral Clock Disable Register 1"] pub struct PMC_PCDR1 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Disable Register 1"] pub mod pmc_pcdr1; #[doc = "Peripheral Clock Status Register 1"] pub struct PMC_PCSR1 { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Clock Status Register 1"] pub mod pmc_pcsr1; #[doc = "Peripheral Control Register"] pub struct PMC_PCR { register: vcell::VolatileCell<u32>, } #[doc = "Peripheral Control Register"] pub mod pmc_pcr; #[doc = "Oscillator Calibration Register"] pub struct PMC_OCR { register: vcell::VolatileCell<u32>, } #[doc = "Oscillator Calibration Register"] pub mod pmc_ocr; #[doc = "SleepWalking Enable Register 0"] pub struct PMC_SLPWK_ER0 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Enable Register 0"] pub mod pmc_slpwk_er0; #[doc = "SleepWalking Disable Register 0"] pub struct PMC_SLPWK_DR0 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Disable Register 0"] pub mod pmc_slpwk_dr0; #[doc = "SleepWalking Status Register 0"] pub struct PMC_SLPWK_SR0 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Status Register 0"] pub mod pmc_slpwk_sr0; #[doc = "SleepWalking Activity Status Register 0"] pub struct PMC_SLPWK_ASR0 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Activity Status Register 0"] pub mod pmc_slpwk_asr0; #[doc = "PLL Maximum Multiplier Value Register"] pub struct PMC_PMMR { register: vcell::VolatileCell<u32>, } #[doc = "PLL Maximum Multiplier Value Register"] pub mod pmc_pmmr; #[doc = "SleepWalking Enable Register 1"] pub struct PMC_SLPWK_ER1 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Enable Register 1"] pub mod pmc_slpwk_er1; #[doc = "SleepWalking Disable Register 1"] pub struct PMC_SLPWK_DR1 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Disable Register 1"] pub mod pmc_slpwk_dr1; #[doc = "SleepWalking Status Register 1"] pub struct PMC_SLPWK_SR1 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Status Register 1"] pub mod pmc_slpwk_sr1; #[doc = "SleepWalking Activity Status Register 1"] pub struct PMC_SLPWK_ASR1 { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Activity Status Register 1"] pub mod pmc_slpwk_asr1; #[doc = "SleepWalking Activity In Progress Register"] pub struct PMC_SLPWK_AIPR { register: vcell::VolatileCell<u32>, } #[doc = "SleepWalking Activity In Progress Register"] pub mod pmc_slpwk_aipr;