Struct atsame70q20b_pac::usbhs::RegisterBlock

source · [−]

#[repr(C)]
pub struct RegisterBlock {Show 30 fields
    pub devctrl: Reg<DEVCTRL_SPEC>,
    pub devisr: Reg<DEVISR_SPEC>,
    pub devicr: Reg<DEVICR_SPEC>,
    pub devifr: Reg<DEVIFR_SPEC>,
    pub devimr: Reg<DEVIMR_SPEC>,
    pub devidr: Reg<DEVIDR_SPEC>,
    pub devier: Reg<DEVIER_SPEC>,
    pub devept: Reg<DEVEPT_SPEC>,
    pub devfnum: Reg<DEVFNUM_SPEC>,
    pub deveptcfg: [Reg<DEVEPTCFG_SPEC>; 10],
    pub usbhs_devdma: [USBHS_DEVDMA; 7],
    pub hstctrl: Reg<HSTCTRL_SPEC>,
    pub hstisr: Reg<HSTISR_SPEC>,
    pub hsticr: Reg<HSTICR_SPEC>,
    pub hstifr: Reg<HSTIFR_SPEC>,
    pub hstimr: Reg<HSTIMR_SPEC>,
    pub hstidr: Reg<HSTIDR_SPEC>,
    pub hstier: Reg<HSTIER_SPEC>,
    pub hstpip: Reg<HSTPIP_SPEC>,
    pub hstfnum: Reg<HSTFNUM_SPEC>,
    pub hstaddr1: Reg<HSTADDR1_SPEC>,
    pub hstaddr2: Reg<HSTADDR2_SPEC>,
    pub hstaddr3: Reg<HSTADDR3_SPEC>,
    pub hstpipinrq: [Reg<HSTPIPINRQ_SPEC>; 10],
    pub hstpiperr: [Reg<HSTPIPERR_SPEC>; 10],
    pub usbhs_hstdma: [USBHS_HSTDMA; 7],
    pub ctrl: Reg<CTRL_SPEC>,
    pub sr: Reg<SR_SPEC>,
    pub scr: Reg<SCR_SPEC>,
    pub sfr: Reg<SFR_SPEC>,
    /* private fields */
}

Expand description

Register block

Fields

devctrl: Reg<DEVCTRL_SPEC>

0x00 - Device General Control Register

devisr: Reg<DEVISR_SPEC>

0x04 - Device Global Interrupt Status Register

devicr: Reg<DEVICR_SPEC>

0x08 - Device Global Interrupt Clear Register

devifr: Reg<DEVIFR_SPEC>

0x0c - Device Global Interrupt Set Register

devimr: Reg<DEVIMR_SPEC>

0x10 - Device Global Interrupt Mask Register

devidr: Reg<DEVIDR_SPEC>

0x14 - Device Global Interrupt Disable Register

devier: Reg<DEVIER_SPEC>

0x18 - Device Global Interrupt Enable Register

devept: Reg<DEVEPT_SPEC>

0x1c - Device Endpoint Register

devfnum: Reg<DEVFNUM_SPEC>

0x20 - Device Frame Number Register

deveptcfg: [Reg<DEVEPTCFG_SPEC>; 10]

0x100..0x128 - Device Endpoint Configuration Register

usbhs_devdma: [USBHS_DEVDMA; 7]

0x310..0x380 - Device DMA Channel Next Descriptor Address Register

hstctrl: Reg<HSTCTRL_SPEC>

0x400 - Host General Control Register

hstisr: Reg<HSTISR_SPEC>

0x404 - Host Global Interrupt Status Register

hsticr: Reg<HSTICR_SPEC>

0x408 - Host Global Interrupt Clear Register

hstifr: Reg<HSTIFR_SPEC>

0x40c - Host Global Interrupt Set Register

hstimr: Reg<HSTIMR_SPEC>

0x410 - Host Global Interrupt Mask Register

hstidr: Reg<HSTIDR_SPEC>

0x414 - Host Global Interrupt Disable Register

hstier: Reg<HSTIER_SPEC>

0x418 - Host Global Interrupt Enable Register

hstpip: Reg<HSTPIP_SPEC>

0x41c - Host Pipe Register

hstfnum: Reg<HSTFNUM_SPEC>

0x420 - Host Frame Number Register

hstaddr1: Reg<HSTADDR1_SPEC>

0x424 - Host Address 1 Register

hstaddr2: Reg<HSTADDR2_SPEC>

0x428 - Host Address 2 Register

hstaddr3: Reg<HSTADDR3_SPEC>

0x42c - Host Address 3 Register

hstpipinrq: [Reg<HSTPIPINRQ_SPEC>; 10]

0x650..0x678 - Host Pipe IN Request Register

hstpiperr: [Reg<HSTPIPERR_SPEC>; 10]

0x680..0x6a8 - Host Pipe Error Register

usbhs_hstdma: [USBHS_HSTDMA; 7]

0x710..0x780 - Host DMA Channel Next Descriptor Address Register

ctrl: Reg<CTRL_SPEC>

0x800 - General Control Register

sr: Reg<SR_SPEC>

0x804 - General Status Register

scr: Reg<SCR_SPEC>

0x808 - General Status Clear Register

sfr: Reg<SFR_SPEC>

0x80c - General Status Set Register

Implementations

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impl RegisterBlock

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pub fn deveptisr_intrpt_mode(&self) -> &[Reg<DEVEPTISR_INTRPT_MODE_SPEC>; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

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pub fn deveptisr_blk_mode(&self) -> &[Reg<DEVEPTISR_BLK_MODE_SPEC>; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

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pub fn deveptisr_iso_mode(&self) -> &[Reg<DEVEPTISR_ISO_MODE_SPEC>; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

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pub fn deveptisr_ctrl_mode(&self) -> &[Reg<DEVEPTISR_CTRL_MODE_SPEC>; 10]

0x130..0x158 - Device Endpoint Interrupt Status Register

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pub fn devepticr_intrpt_mode(&self) -> &[Reg<DEVEPTICR_INTRPT_MODE_SPEC>; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

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pub fn devepticr_blk_mode(&self) -> &[Reg<DEVEPTICR_BLK_MODE_SPEC>; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

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pub fn devepticr_iso_mode(&self) -> &[Reg<DEVEPTICR_ISO_MODE_SPEC>; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

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pub fn devepticr_ctrl_mode(&self) -> &[Reg<DEVEPTICR_CTRL_MODE_SPEC>; 10]

0x160..0x188 - Device Endpoint Interrupt Clear Register

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pub fn deveptifr_intrpt_mode(&self) -> &[Reg<DEVEPTIFR_INTRPT_MODE_SPEC>; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

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pub fn deveptifr_blk_mode(&self) -> &[Reg<DEVEPTIFR_BLK_MODE_SPEC>; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

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pub fn deveptifr_iso_mode(&self) -> &[Reg<DEVEPTIFR_ISO_MODE_SPEC>; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

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pub fn deveptifr_ctrl_mode(&self) -> &[Reg<DEVEPTIFR_CTRL_MODE_SPEC>; 10]

0x190..0x1b8 - Device Endpoint Interrupt Set Register

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pub fn deveptimr_intrpt_mode(&self) -> &[Reg<DEVEPTIMR_INTRPT_MODE_SPEC>; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

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pub fn deveptimr_blk_mode(&self) -> &[Reg<DEVEPTIMR_BLK_MODE_SPEC>; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

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pub fn deveptimr_iso_mode(&self) -> &[Reg<DEVEPTIMR_ISO_MODE_SPEC>; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

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pub fn deveptimr_ctrl_mode(&self) -> &[Reg<DEVEPTIMR_CTRL_MODE_SPEC>; 10]

0x1c0..0x1e8 - Device Endpoint Interrupt Mask Register

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pub fn deveptier_intrpt_mode(&self) -> &[Reg<DEVEPTIER_INTRPT_MODE_SPEC>; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

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pub fn deveptier_blk_mode(&self) -> &[Reg<DEVEPTIER_BLK_MODE_SPEC>; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

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pub fn deveptier_iso_mode(&self) -> &[Reg<DEVEPTIER_ISO_MODE_SPEC>; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

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pub fn deveptier_ctrl_mode(&self) -> &[Reg<DEVEPTIER_CTRL_MODE_SPEC>; 10]

0x1f0..0x218 - Device Endpoint Interrupt Enable Register

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pub fn deveptidr_intrpt_mode(&self) -> &[Reg<DEVEPTIDR_INTRPT_MODE_SPEC>; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

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pub fn deveptidr_blk_mode(&self) -> &[Reg<DEVEPTIDR_BLK_MODE_SPEC>; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

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pub fn deveptidr_iso_mode(&self) -> &[Reg<DEVEPTIDR_ISO_MODE_SPEC>; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

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pub fn deveptidr_ctrl_mode(&self) -> &[Reg<DEVEPTIDR_CTRL_MODE_SPEC>; 10]

0x220..0x248 - Device Endpoint Interrupt Disable Register

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pub fn hstpipcfg_ctrl_bulk_mode(
&self
) -> &[Reg<HSTPIPCFG_CTRL_BULK_MODE_SPEC>; 10]

0x500..0x528 - Host Pipe Configuration Register

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pub fn hstpipcfg(&self) -> &[Reg<HSTPIPCFG_SPEC>; 10]

0x500..0x528 - Host Pipe Configuration Register

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pub fn hstpipisr_intrpt_mode(&self) -> &[Reg<HSTPIPISR_INTRPT_MODE_SPEC>; 10]

0x530..0x558 - Host Pipe Status Register

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pub fn hstpipisr_blk_mode(&self) -> &[Reg<HSTPIPISR_BLK_MODE_SPEC>; 10]

0x530..0x558 - Host Pipe Status Register

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pub fn hstpipisr_iso_mode(&self) -> &[Reg<HSTPIPISR_ISO_MODE_SPEC>; 10]

0x530..0x558 - Host Pipe Status Register

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pub fn hstpipisr_ctrl_mode(&self) -> &[Reg<HSTPIPISR_CTRL_MODE_SPEC>; 10]

0x530..0x558 - Host Pipe Status Register

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pub fn hstpipicr_intrpt_mode(&self) -> &[Reg<HSTPIPICR_INTRPT_MODE_SPEC>; 10]

0x560..0x588 - Host Pipe Clear Register

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pub fn hstpipicr_blk_mode(&self) -> &[Reg<HSTPIPICR_BLK_MODE_SPEC>; 10]

0x560..0x588 - Host Pipe Clear Register

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pub fn hstpipicr_iso_mode(&self) -> &[Reg<HSTPIPICR_ISO_MODE_SPEC>; 10]

0x560..0x588 - Host Pipe Clear Register

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pub fn hstpipicr_ctrl_mode(&self) -> &[Reg<HSTPIPICR_CTRL_MODE_SPEC>; 10]

0x560..0x588 - Host Pipe Clear Register

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pub fn hstpipifr_intrpt_mode(&self) -> &[Reg<HSTPIPIFR_INTRPT_MODE_SPEC>; 10]

0x590..0x5b8 - Host Pipe Set Register

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pub fn hstpipifr_blk_mode(&self) -> &[Reg<HSTPIPIFR_BLK_MODE_SPEC>; 10]

0x590..0x5b8 - Host Pipe Set Register

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pub fn hstpipifr_iso_mode(&self) -> &[Reg<HSTPIPIFR_ISO_MODE_SPEC>; 10]

0x590..0x5b8 - Host Pipe Set Register

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pub fn hstpipifr_ctrl_mode(&self) -> &[Reg<HSTPIPIFR_CTRL_MODE_SPEC>; 10]

0x590..0x5b8 - Host Pipe Set Register

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pub fn hstpipimr_intrpt_mode(&self) -> &[Reg<HSTPIPIMR_INTRPT_MODE_SPEC>; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

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pub fn hstpipimr_blk_mode(&self) -> &[Reg<HSTPIPIMR_BLK_MODE_SPEC>; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

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pub fn hstpipimr_iso_mode(&self) -> &[Reg<HSTPIPIMR_ISO_MODE_SPEC>; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

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pub fn hstpipimr_ctrl_mode(&self) -> &[Reg<HSTPIPIMR_CTRL_MODE_SPEC>; 10]

0x5c0..0x5e8 - Host Pipe Mask Register

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pub fn hstpipier_intrpt_mode(&self) -> &[Reg<HSTPIPIER_INTRPT_MODE_SPEC>; 10]

0x5f0..0x618 - Host Pipe Enable Register

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pub fn hstpipier_blk_mode(&self) -> &[Reg<HSTPIPIER_BLK_MODE_SPEC>; 10]

0x5f0..0x618 - Host Pipe Enable Register

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pub fn hstpipier_iso_mode(&self) -> &[Reg<HSTPIPIER_ISO_MODE_SPEC>; 10]

0x5f0..0x618 - Host Pipe Enable Register

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pub fn hstpipier_ctrl_mode(&self) -> &[Reg<HSTPIPIER_CTRL_MODE_SPEC>; 10]

0x5f0..0x618 - Host Pipe Enable Register

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pub fn hstpipidr_intrpt_mode(&self) -> &[Reg<HSTPIPIDR_INTRPT_MODE_SPEC>; 10]

0x620..0x648 - Host Pipe Disable Register

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pub fn hstpipidr_blk_mode(&self) -> &[Reg<HSTPIPIDR_BLK_MODE_SPEC>; 10]

0x620..0x648 - Host Pipe Disable Register

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pub fn hstpipidr_iso_mode(&self) -> &[Reg<HSTPIPIDR_ISO_MODE_SPEC>; 10]

0x620..0x648 - Host Pipe Disable Register

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pub fn hstpipidr_ctrl_mode(&self) -> &[Reg<HSTPIPIDR_CTRL_MODE_SPEC>; 10]

0x620..0x648 - Host Pipe Disable Register

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

source

impl<T> Any for T where
T: 'static + ?Sized,

source

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

source

impl<T> Borrow<T> for T where
T: ?Sized,

const: unstable · source

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

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impl<T> BorrowMut<T> for T where
T: ?Sized,

const: unstable · source

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

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impl<T> From<T> for T

const: unstable · source

fn from(t: T) -> T

Returns the argument unchanged.

source

impl<T, U> Into for T where
U: From<T>,

const: unstable · source

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

source

impl<T, U> TryFrom for T where
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

const: unstable · source

fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

source

impl<T, U> TryInto for T where
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

const: unstable · source

fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct atsame70q20b_pac::usbhs::RegisterBlock

Fields

Implementations

impl RegisterBlock

pub fn deveptisr_intrpt_mode(&self) -> &[Reg<DEVEPTISR_INTRPT_MODE_SPEC>; 10]

pub fn deveptisr_blk_mode(&self) -> &[Reg<DEVEPTISR_BLK_MODE_SPEC>; 10]

pub fn deveptisr_iso_mode(&self) -> &[Reg<DEVEPTISR_ISO_MODE_SPEC>; 10]

pub fn deveptisr_ctrl_mode(&self) -> &[Reg<DEVEPTISR_CTRL_MODE_SPEC>; 10]

pub fn devepticr_intrpt_mode(&self) -> &[Reg<DEVEPTICR_INTRPT_MODE_SPEC>; 10]

pub fn devepticr_blk_mode(&self) -> &[Reg<DEVEPTICR_BLK_MODE_SPEC>; 10]

pub fn devepticr_iso_mode(&self) -> &[Reg<DEVEPTICR_ISO_MODE_SPEC>; 10]

pub fn devepticr_ctrl_mode(&self) -> &[Reg<DEVEPTICR_CTRL_MODE_SPEC>; 10]

pub fn deveptifr_intrpt_mode(&self) -> &[Reg<DEVEPTIFR_INTRPT_MODE_SPEC>; 10]

pub fn deveptifr_blk_mode(&self) -> &[Reg<DEVEPTIFR_BLK_MODE_SPEC>; 10]

pub fn deveptifr_iso_mode(&self) -> &[Reg<DEVEPTIFR_ISO_MODE_SPEC>; 10]

pub fn deveptifr_ctrl_mode(&self) -> &[Reg<DEVEPTIFR_CTRL_MODE_SPEC>; 10]

pub fn deveptimr_intrpt_mode(&self) -> &[Reg<DEVEPTIMR_INTRPT_MODE_SPEC>; 10]

pub fn deveptimr_blk_mode(&self) -> &[Reg<DEVEPTIMR_BLK_MODE_SPEC>; 10]

pub fn deveptimr_iso_mode(&self) -> &[Reg<DEVEPTIMR_ISO_MODE_SPEC>; 10]

pub fn deveptimr_ctrl_mode(&self) -> &[Reg<DEVEPTIMR_CTRL_MODE_SPEC>; 10]

pub fn deveptier_intrpt_mode(&self) -> &[Reg<DEVEPTIER_INTRPT_MODE_SPEC>; 10]

pub fn deveptier_blk_mode(&self) -> &[Reg<DEVEPTIER_BLK_MODE_SPEC>; 10]

pub fn deveptier_iso_mode(&self) -> &[Reg<DEVEPTIER_ISO_MODE_SPEC>; 10]

pub fn deveptier_ctrl_mode(&self) -> &[Reg<DEVEPTIER_CTRL_MODE_SPEC>; 10]

pub fn deveptidr_intrpt_mode(&self) -> &[Reg<DEVEPTIDR_INTRPT_MODE_SPEC>; 10]

pub fn deveptidr_blk_mode(&self) -> &[Reg<DEVEPTIDR_BLK_MODE_SPEC>; 10]

pub fn deveptidr_iso_mode(&self) -> &[Reg<DEVEPTIDR_ISO_MODE_SPEC>; 10]

pub fn deveptidr_ctrl_mode(&self) -> &[Reg<DEVEPTIDR_CTRL_MODE_SPEC>; 10]

pub fn hstpipcfg_ctrl_bulk_mode( &self) -> &[Reg<HSTPIPCFG_CTRL_BULK_MODE_SPEC>; 10]

pub fn hstpipcfg(&self) -> &[Reg<HSTPIPCFG_SPEC>; 10]

pub fn hstpipisr_intrpt_mode(&self) -> &[Reg<HSTPIPISR_INTRPT_MODE_SPEC>; 10]

pub fn hstpipisr_blk_mode(&self) -> &[Reg<HSTPIPISR_BLK_MODE_SPEC>; 10]

pub fn hstpipisr_iso_mode(&self) -> &[Reg<HSTPIPISR_ISO_MODE_SPEC>; 10]

pub fn hstpipisr_ctrl_mode(&self) -> &[Reg<HSTPIPISR_CTRL_MODE_SPEC>; 10]

pub fn hstpipicr_intrpt_mode(&self) -> &[Reg<HSTPIPICR_INTRPT_MODE_SPEC>; 10]

pub fn hstpipicr_blk_mode(&self) -> &[Reg<HSTPIPICR_BLK_MODE_SPEC>; 10]

pub fn hstpipicr_iso_mode(&self) -> &[Reg<HSTPIPICR_ISO_MODE_SPEC>; 10]

pub fn hstpipicr_ctrl_mode(&self) -> &[Reg<HSTPIPICR_CTRL_MODE_SPEC>; 10]

pub fn hstpipifr_intrpt_mode(&self) -> &[Reg<HSTPIPIFR_INTRPT_MODE_SPEC>; 10]

pub fn hstpipifr_blk_mode(&self) -> &[Reg<HSTPIPIFR_BLK_MODE_SPEC>; 10]

pub fn hstpipifr_iso_mode(&self) -> &[Reg<HSTPIPIFR_ISO_MODE_SPEC>; 10]

pub fn hstpipifr_ctrl_mode(&self) -> &[Reg<HSTPIPIFR_CTRL_MODE_SPEC>; 10]

pub fn hstpipimr_intrpt_mode(&self) -> &[Reg<HSTPIPIMR_INTRPT_MODE_SPEC>; 10]

pub fn hstpipimr_blk_mode(&self) -> &[Reg<HSTPIPIMR_BLK_MODE_SPEC>; 10]

pub fn hstpipimr_iso_mode(&self) -> &[Reg<HSTPIPIMR_ISO_MODE_SPEC>; 10]

pub fn hstpipimr_ctrl_mode(&self) -> &[Reg<HSTPIPIMR_CTRL_MODE_SPEC>; 10]

pub fn hstpipier_intrpt_mode(&self) -> &[Reg<HSTPIPIER_INTRPT_MODE_SPEC>; 10]

pub fn hstpipier_blk_mode(&self) -> &[Reg<HSTPIPIER_BLK_MODE_SPEC>; 10]

pub fn hstpipier_iso_mode(&self) -> &[Reg<HSTPIPIER_ISO_MODE_SPEC>; 10]

pub fn hstpipier_ctrl_mode(&self) -> &[Reg<HSTPIPIER_CTRL_MODE_SPEC>; 10]

pub fn hstpipidr_intrpt_mode(&self) -> &[Reg<HSTPIPIDR_INTRPT_MODE_SPEC>; 10]

pub fn hstpipidr_blk_mode(&self) -> &[Reg<HSTPIPIDR_BLK_MODE_SPEC>; 10]

pub fn hstpipidr_iso_mode(&self) -> &[Reg<HSTPIPIDR_ISO_MODE_SPEC>; 10]

pub fn hstpipidr_ctrl_mode(&self) -> &[Reg<HSTPIPIDR_CTRL_MODE_SPEC>; 10]

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for T where T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for T where T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for T where U: From<T>,

fn into(self) -> U

impl<T, U> TryFrom<U> for T where U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for T where U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

pub fn hstpipcfg_ctrl_bulk_mode(
&self
) -> &[Reg<HSTPIPCFG_CTRL_BULK_MODE_SPEC>; 10]

impl<T> Any for T where
T: 'static + ?Sized,

impl<T> Borrow<T> for T where
T: ?Sized,

impl<T> BorrowMut<T> for T where
T: ?Sized,

impl<T, U> Into<U> for T where
U: From<T>,

impl<T, U> TryFrom<U> for T where
U: Into<T>,

impl<T, U> TryInto<U> for T where
U: TryFrom<T>,