#[repr(u8)]
pub enum URAT_A {
IDR_WR_PROCESSING,
ODR_RD_PROCESSING,
MR_WR_PROCESSING,
ODR_RD_SUBKGEN,
MR_WR_SUBKGEN,
WOR_RD_ACCESS,
}
Expand description
Unspecified Register Access (cleared by writing SWRST in AES_CR)
Value on reset: 0
Variants
IDR_WR_PROCESSING
0: Input Data Register written during the data processing when SMOD = 0x2 mode.
ODR_RD_PROCESSING
1: Output Data Register read during the data processing.
MR_WR_PROCESSING
2: Mode Register written during the data processing.
ODR_RD_SUBKGEN
3: Output Data Register read during the sub-keys generation.
MR_WR_SUBKGEN
4: Mode Register written during the sub-keys generation.
WOR_RD_ACCESS
5: Write-only register read access.
Trait Implementations
impl Copy for URAT_A
impl StructuralPartialEq for URAT_A
Auto Trait Implementations
impl RefUnwindSafe for URAT_A
impl Send for URAT_A
impl Sync for URAT_A
impl Unpin for URAT_A
impl UnwindSafe for URAT_A
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more