Type Definition atsame70n20b_pac::pwm0::clk::W[][src]

type W = W<u32, CLK>;

Writer for register CLK

Implementations

impl W[src]

pub fn diva(&mut self) -> DIVA_W<'_>[src]

Bits 0:7 - CLKA Divide Factor

pub fn prea(&mut self) -> PREA_W<'_>[src]

Bits 8:11 - CLKA Source Clock Selection

pub fn divb(&mut self) -> DIVB_W<'_>[src]

Bits 16:23 - CLKB Divide Factor

pub fn preb(&mut self) -> PREB_W<'_>[src]

Bits 24:27 - CLKB Source Clock Selection