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#[doc = "Reader of register DACC_MR"] pub type R = crate::R<u32, super::DACC_MR>; #[doc = "Writer for register DACC_MR"] pub type W = crate::W<u32, super::DACC_MR>; #[doc = "Register DACC_MR `reset()`'s with value 0"] impl crate::ResetValue for super::DACC_MR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Max Speed Mode for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MAXS0_A { #[doc = "0: External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)"] TRIG_EVENT = 0, #[doc = "1: Max speed mode enabled."] MAXIMUM = 1, } impl From<MAXS0_A> for bool { #[inline(always)] fn from(variant: MAXS0_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `MAXS0`"] pub type MAXS0_R = crate::R<bool, MAXS0_A>; impl MAXS0_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> MAXS0_A { match self.bits { false => MAXS0_A::TRIG_EVENT, true => MAXS0_A::MAXIMUM, } } #[doc = "Checks if the value of the field is `TRIG_EVENT`"] #[inline(always)] pub fn is_trig_event(&self) -> bool { *self == MAXS0_A::TRIG_EVENT } #[doc = "Checks if the value of the field is `MAXIMUM`"] #[inline(always)] pub fn is_maximum(&self) -> bool { *self == MAXS0_A::MAXIMUM } } #[doc = "Write proxy for field `MAXS0`"] pub struct MAXS0_W<'a> { w: &'a mut W, } impl<'a> MAXS0_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MAXS0_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)"] #[inline(always)] pub fn trig_event(self) -> &'a mut W { self.variant(MAXS0_A::TRIG_EVENT) } #[doc = "Max speed mode enabled."] #[inline(always)] pub fn maximum(self) -> &'a mut W { self.variant(MAXS0_A::MAXIMUM) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Max Speed Mode for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum MAXS1_A { #[doc = "0: External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)"] TRIG_EVENT = 0, #[doc = "1: Max speed mode enabled."] MAXIMUM = 1, } impl From<MAXS1_A> for bool { #[inline(always)] fn from(variant: MAXS1_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `MAXS1`"] pub type MAXS1_R = crate::R<bool, MAXS1_A>; impl MAXS1_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> MAXS1_A { match self.bits { false => MAXS1_A::TRIG_EVENT, true => MAXS1_A::MAXIMUM, } } #[doc = "Checks if the value of the field is `TRIG_EVENT`"] #[inline(always)] pub fn is_trig_event(&self) -> bool { *self == MAXS1_A::TRIG_EVENT } #[doc = "Checks if the value of the field is `MAXIMUM`"] #[inline(always)] pub fn is_maximum(&self) -> bool { *self == MAXS1_A::MAXIMUM } } #[doc = "Write proxy for field `MAXS1`"] pub struct MAXS1_W<'a> { w: &'a mut W, } impl<'a> MAXS1_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: MAXS1_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)"] #[inline(always)] pub fn trig_event(self) -> &'a mut W { self.variant(MAXS1_A::TRIG_EVENT) } #[doc = "Max speed mode enabled."] #[inline(always)] pub fn maximum(self) -> &'a mut W { self.variant(MAXS1_A::MAXIMUM) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Word Transfer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum WORD_A { #[doc = "0: One data to convert is written to the FIFO per access to DACC."] DISABLED = 0, #[doc = "1: Two data to convert are written to the FIFO per access to DACC (reduces the number of requests to DMA and the number of system bus accesses)."] ENABLED = 1, } impl From<WORD_A> for bool { #[inline(always)] fn from(variant: WORD_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `WORD`"] pub type WORD_R = crate::R<bool, WORD_A>; impl WORD_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> WORD_A { match self.bits { false => WORD_A::DISABLED, true => WORD_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == WORD_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == WORD_A::ENABLED } } #[doc = "Write proxy for field `WORD`"] pub struct WORD_W<'a> { w: &'a mut W, } impl<'a> WORD_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: WORD_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "One data to convert is written to the FIFO per access to DACC."] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(WORD_A::DISABLED) } #[doc = "Two data to convert are written to the FIFO per access to DACC (reduces the number of requests to DMA and the number of system bus accesses)."] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(WORD_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `ZERO`"] pub type ZERO_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ZERO`"] pub struct ZERO_W<'a> { w: &'a mut W, } impl<'a> ZERO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Differential Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum DIFF_A { #[doc = "0: DAC0 and DAC1 are single-ended outputs."] DISABLED = 0, #[doc = "1: DACP and DACN are differential outputs. The differential level is configured by the channel 0 value."] ENABLED = 1, } impl From<DIFF_A> for bool { #[inline(always)] fn from(variant: DIFF_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `DIFF`"] pub type DIFF_R = crate::R<bool, DIFF_A>; impl DIFF_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> DIFF_A { match self.bits { false => DIFF_A::DISABLED, true => DIFF_A::ENABLED, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == DIFF_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == DIFF_A::ENABLED } } #[doc = "Write proxy for field `DIFF`"] pub struct DIFF_W<'a> { w: &'a mut W, } impl<'a> DIFF_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: DIFF_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "DAC0 and DAC1 are single-ended outputs."] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(DIFF_A::DISABLED) } #[doc = "DACP and DACN are differential outputs. The differential level is configured by the channel 0 value."] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(DIFF_A::ENABLED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); self.w } } #[doc = "Reader of field `PRESCALER`"] pub type PRESCALER_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PRESCALER`"] pub struct PRESCALER_W<'a> { w: &'a mut W, } impl<'a> PRESCALER_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | (((value as u32) & 0x0f) << 24); self.w } } impl R { #[doc = "Bit 0 - Max Speed Mode for Channel 0"] #[inline(always)] pub fn maxs0(&self) -> MAXS0_R { MAXS0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Max Speed Mode for Channel 1"] #[inline(always)] pub fn maxs1(&self) -> MAXS1_R { MAXS1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 4 - Word Transfer Mode"] #[inline(always)] pub fn word(&self) -> WORD_R { WORD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Must always be written to 0."] #[inline(always)] pub fn zero(&self) -> ZERO_R { ZERO_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 23 - Differential Mode"] #[inline(always)] pub fn diff(&self) -> DIFF_R { DIFF_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bits 24:27 - Peripheral Clock to DAC Clock Ratio"] #[inline(always)] pub fn prescaler(&self) -> PRESCALER_R { PRESCALER_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Max Speed Mode for Channel 0"] #[inline(always)] pub fn maxs0(&mut self) -> MAXS0_W { MAXS0_W { w: self } } #[doc = "Bit 1 - Max Speed Mode for Channel 1"] #[inline(always)] pub fn maxs1(&mut self) -> MAXS1_W { MAXS1_W { w: self } } #[doc = "Bit 4 - Word Transfer Mode"] #[inline(always)] pub fn word(&mut self) -> WORD_W { WORD_W { w: self } } #[doc = "Bit 5 - Must always be written to 0."] #[inline(always)] pub fn zero(&mut self) -> ZERO_W { ZERO_W { w: self } } #[doc = "Bit 23 - Differential Mode"] #[inline(always)] pub fn diff(&mut self) -> DIFF_W { DIFF_W { w: self } } #[doc = "Bits 24:27 - Peripheral Clock to DAC Clock Ratio"] #[inline(always)] pub fn prescaler(&mut self) -> PRESCALER_W { PRESCALER_W { w: self } } }