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#[doc = "Reader of register AFEC_ACR"] pub type R = crate::R<u32, super::AFEC_ACR>; #[doc = "Writer for register AFEC_ACR"] pub type W = crate::W<u32, super::AFEC_ACR>; #[doc = "Register AFEC_ACR `reset()`'s with value 0"] impl crate::ResetValue for super::AFEC_ACR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `PGA0EN`"] pub type PGA0EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PGA0EN`"] pub struct PGA0EN_W<'a> { w: &'a mut W, } impl<'a> PGA0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `PGA1EN`"] pub type PGA1EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PGA1EN`"] pub struct PGA1EN_W<'a> { w: &'a mut W, } impl<'a> PGA1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `IBCTL`"] pub type IBCTL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `IBCTL`"] pub struct IBCTL_W<'a> { w: &'a mut W, } impl<'a> IBCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8); self.w } } impl R { #[doc = "Bit 2 - PGA0 Enable"] #[inline(always)] pub fn pga0en(&self) -> PGA0EN_R { PGA0EN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - PGA1 Enable"] #[inline(always)] pub fn pga1en(&self) -> PGA1EN_R { PGA1EN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 8:9 - AFE Bias Current Control"] #[inline(always)] pub fn ibctl(&self) -> IBCTL_R { IBCTL_R::new(((self.bits >> 8) & 0x03) as u8) } } impl W { #[doc = "Bit 2 - PGA0 Enable"] #[inline(always)] pub fn pga0en(&mut self) -> PGA0EN_W { PGA0EN_W { w: self } } #[doc = "Bit 3 - PGA1 Enable"] #[inline(always)] pub fn pga1en(&mut self) -> PGA1EN_W { PGA1EN_W { w: self } } #[doc = "Bits 8:9 - AFE Bias Current Control"] #[inline(always)] pub fn ibctl(&mut self) -> IBCTL_W { IBCTL_W { w: self } } }