Type Definition atsame54n19a_pac::can0::ils::W[][src]

type W = W<u32, ILS>;

Writer for register ILS

Implementations

impl W[src]

pub fn rf0nl(&mut self) -> RF0NL_W<'_>[src]

Bit 0 - Rx FIFO 0 New Message Interrupt Line

pub fn rf0wl(&mut self) -> RF0WL_W<'_>[src]

Bit 1 - Rx FIFO 0 Watermark Reached Interrupt Line

pub fn rf0fl(&mut self) -> RF0FL_W<'_>[src]

Bit 2 - Rx FIFO 0 Full Interrupt Line

pub fn rf0ll(&mut self) -> RF0LL_W<'_>[src]

Bit 3 - Rx FIFO 0 Message Lost Interrupt Line

pub fn rf1nl(&mut self) -> RF1NL_W<'_>[src]

Bit 4 - Rx FIFO 1 New Message Interrupt Line

pub fn rf1wl(&mut self) -> RF1WL_W<'_>[src]

Bit 5 - Rx FIFO 1 Watermark Reached Interrupt Line

pub fn rf1fl(&mut self) -> RF1FL_W<'_>[src]

Bit 6 - Rx FIFO 1 FIFO Full Interrupt Line

pub fn rf1ll(&mut self) -> RF1LL_W<'_>[src]

Bit 7 - Rx FIFO 1 Message Lost Interrupt Line

pub fn hpml(&mut self) -> HPML_W<'_>[src]

Bit 8 - High Priority Message Interrupt Line

pub fn tcl(&mut self) -> TCL_W<'_>[src]

Bit 9 - Timestamp Completed Interrupt Line

pub fn tcfl(&mut self) -> TCFL_W<'_>[src]

Bit 10 - Transmission Cancellation Finished Interrupt Line

pub fn tfel(&mut self) -> TFEL_W<'_>[src]

Bit 11 - Tx FIFO Empty Interrupt Line

pub fn tefnl(&mut self) -> TEFNL_W<'_>[src]

Bit 12 - Tx Event FIFO New Entry Interrupt Line

pub fn tefwl(&mut self) -> TEFWL_W<'_>[src]

Bit 13 - Tx Event FIFO Watermark Reached Interrupt Line

pub fn teffl(&mut self) -> TEFFL_W<'_>[src]

Bit 14 - Tx Event FIFO Full Interrupt Line

pub fn tefll(&mut self) -> TEFLL_W<'_>[src]

Bit 15 - Tx Event FIFO Element Lost Interrupt Line

pub fn tswl(&mut self) -> TSWL_W<'_>[src]

Bit 16 - Timestamp Wraparound Interrupt Line

pub fn mrafl(&mut self) -> MRAFL_W<'_>[src]

Bit 17 - Message RAM Access Failure Interrupt Line

pub fn tool(&mut self) -> TOOL_W<'_>[src]

Bit 18 - Timeout Occurred Interrupt Line

pub fn drxl(&mut self) -> DRXL_W<'_>[src]

Bit 19 - Message stored to Dedicated Rx Buffer Interrupt Line

pub fn becl(&mut self) -> BECL_W<'_>[src]

Bit 20 - Bit Error Corrected Interrupt Line

pub fn beul(&mut self) -> BEUL_W<'_>[src]

Bit 21 - Bit Error Uncorrected Interrupt Line

pub fn elol(&mut self) -> ELOL_W<'_>[src]

Bit 22 - Error Logging Overflow Interrupt Line

pub fn epl(&mut self) -> EPL_W<'_>[src]

Bit 23 - Error Passive Interrupt Line

pub fn ewl(&mut self) -> EWL_W<'_>[src]

Bit 24 - Warning Status Interrupt Line

pub fn bol(&mut self) -> BOL_W<'_>[src]

Bit 25 - Bus_Off Status Interrupt Line

pub fn wdil(&mut self) -> WDIL_W<'_>[src]

Bit 26 - Watchdog Interrupt Interrupt Line

pub fn peal(&mut self) -> PEAL_W<'_>[src]

Bit 27 - Protocol Error in Arbitration Phase Line

pub fn pedl(&mut self) -> PEDL_W<'_>[src]

Bit 28 - Protocol Error in Data Phase Line

pub fn aral(&mut self) -> ARAL_W<'_>[src]

Bit 29 - Access to Reserved Address Line