Type Alias atsame54n::gmac::isr::W

pub type W = W<ISR_SPEC>;

Register ISR writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn mfs(&mut self) -> MFS_W<'_, ISR_SPEC, 0>

Bit 0 - Management Frame Sent

pub fn rcomp(&mut self) -> RCOMP_W<'_, ISR_SPEC, 1>

Bit 1 - Receive Complete

pub fn rxubr(&mut self) -> RXUBR_W<'_, ISR_SPEC, 2>

Bit 2 - RX Used Bit Read

pub fn txubr(&mut self) -> TXUBR_W<'_, ISR_SPEC, 3>

Bit 3 - TX Used Bit Read

pub fn tur(&mut self) -> TUR_W<'_, ISR_SPEC, 4>

Bit 4 - Transmit Underrun

pub fn rlex(&mut self) -> RLEX_W<'_, ISR_SPEC, 5>

Bit 5 - Retry Limit Exceeded

pub fn tfc(&mut self) -> TFC_W<'_, ISR_SPEC, 6>

Bit 6 - Transmit Frame Corruption Due to AHB Error

pub fn tcomp(&mut self) -> TCOMP_W<'_, ISR_SPEC, 7>

Bit 7 - Transmit Complete

pub fn rovr(&mut self) -> ROVR_W<'_, ISR_SPEC, 10>

Bit 10 - Receive Overrun

pub fn hresp(&mut self) -> HRESP_W<'_, ISR_SPEC, 11>

Bit 11 - HRESP Not OK

pub fn pfnz(&mut self) -> PFNZ_W<'_, ISR_SPEC, 12>

Bit 12 - Pause Frame with Non-zero Pause Quantum Received

pub fn ptz(&mut self) -> PTZ_W<'_, ISR_SPEC, 13>

Bit 13 - Pause Time Zero

pub fn pftr(&mut self) -> PFTR_W<'_, ISR_SPEC, 14>

Bit 14 - Pause Frame Transmitted

pub fn drqfr(&mut self) -> DRQFR_W<'_, ISR_SPEC, 18>

Bit 18 - PTP Delay Request Frame Received

pub fn sfr(&mut self) -> SFR_W<'_, ISR_SPEC, 19>

Bit 19 - PTP Sync Frame Received

pub fn drqft(&mut self) -> DRQFT_W<'_, ISR_SPEC, 20>

Bit 20 - PTP Delay Request Frame Transmitted

pub fn sft(&mut self) -> SFT_W<'_, ISR_SPEC, 21>

Bit 21 - PTP Sync Frame Transmitted

pub fn pdrqfr(&mut self) -> PDRQFR_W<'_, ISR_SPEC, 22>

Bit 22 - PDelay Request Frame Received

pub fn pdrsfr(&mut self) -> PDRSFR_W<'_, ISR_SPEC, 23>

Bit 23 - PDelay Response Frame Received

pub fn pdrqft(&mut self) -> PDRQFT_W<'_, ISR_SPEC, 24>

Bit 24 - PDelay Request Frame Transmitted

pub fn pdrsft(&mut self) -> PDRSFT_W<'_, ISR_SPEC, 25>

Bit 25 - PDelay Response Frame Transmitted

pub fn sri(&mut self) -> SRI_W<'_, ISR_SPEC, 26>

Bit 26 - TSU Seconds Register Increment

pub fn wol(&mut self) -> WOL_W<'_, ISR_SPEC, 28>

Bit 28 - Wake On LAN

pub fn tsucmp(&mut self) -> TSUCMP_W<'_, ISR_SPEC, 29>

Bit 29 - Tsu timer comparison

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual